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NE570 PDF даташит

Спецификация NE570 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «Compandor».

Детали детали

Номер произв NE570
Описание Compandor
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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NE570 Даташит, Описание, Даташиты
NE570
Compandor
The NE570 is a versatile low cost dual gain control circuit in which
either channel may be used as a dynamic range compressor or
expandor. Each channel has a full−wave rectifier to detect the average
value of the signal, a linerarized temperature−compensated variable
gain cell, and an operational amplifier.
The NE570 is well suited for use in cellular radio and radio
communications systems, modems, telephone, and satellite
broadcast/receive audio systems.
Features
Complete Compressor and Expandor in One IC
Temperature Compensated
Greater than 110 dB Dynamic Range
Operates Down to 6.0 VDC
System Levels Adjustable with External Components
Distortion may be Trimmed Out
Pb−Free Packages are Available*
Applications
Cellular Radio
Telephone Trunk Comandor
High Level Limiter
Low Level Expandor − Noise Gate
Dynamic Noise Reduction Systems
Voltage−Controlled Amplifier
Dynamic Filters
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MAXIMUM RATINGS
Rating
Symbol Value
Unit
Maximum Operating Voltage
VCC 24 VDC
Operating Ambient Temperature Range
TA 0 to +70 °C
Operating Junction Temperature
TJ 150 °C
Power Dissipation
PD 400 mW
Thermal Resistance, Junction−to−Ambient RqJA
105 °C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
DG CELL IN
RECT IN
THD TRIM
R2 20 kW VARIABLE
GAIN
R1 10 kW
RECTIFIER
R3
R3
20 kW
INVERTER IN
R4
30 kW
VREF
1.8 V
+
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MARKING
DIAGRAM
16
1
SOIC−16 WB
D SUFFIX
CASE 751G
NE570D
AWLYYWWG
1
Plastic Small Outline Package;
16 Leads; Body Width 7.5 mm
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
RECT_CAP_1 1
RECT_IN_1 2
DG_CELL_IN_1 3
GND 4
INV_IN_1 5
RES_R3_1 6
OUTPUT_1 7
THD_TRIM_1 8
16 RECT_CAP_2
15 RECT_IN_2
14 DG_CELL_IN_2
13 VCC
12 INV_IN_2
11 RES_R3_2
10 OUTPUT_2
9 THD_TRIM_2
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
OUTPUT
RECT CAP
Figure 1. Block Diagram
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 4
1
Publication Order Number:
NE570/D









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NE570 Даташит, Описание, Даташиты
PIN FUNCTION DESCRIPTION
Pin Symbol
1 RECT CAP 1
2 RECT IN 1
3 DG CELL IN 1
4 GND
5 INV. IN 1
6 RES. R3 1
7 OUTPUT 1
8 THD TRIM 1
9 THD TRIM 2
10 OUTPUT 2
11 RES. R3 2
12 INV. IN 2
13 VCC
14 DG CELL IN 2
15 RECT IN 2
16 RECT CAP 2
NE570
Description
External Capacitor Pinout for Rectifier 1
Rectifier 1 Input
Variable Gain Cell 1 Input
Ground
Inverted Input 1
R3 Pinout 1
Output 1
Total Harmonic Distortion Trim 1
Total Harmonic Distortion Trim 2
Output 2
R3 Pinout 2
Inverted Input 2
Positive Power Supply
Variable Gain Cell 2 Input
Rectifier 2 Input
External Capacitor Pinout for Rectifier 2
ELECTRICAL CHARACTERISTICS VCC = +15 V, TA = 25 °C; unless otherwise stated.
Characteristic
Test Conditions
Symbol
Supply Voltage
VCC
Supply Current
No Signal
ICC
Output Current Capability
IOUT
Output Slew Rate
SR
Gain Cell Distortion (Note 1)
Untrimmed
Trimmed
Resistor Tolerance
Internal Reference Voltage
Output DC Shift (Note 2)
Untrimmed
Expandor Output Noise
No signal, 15 Hz to 20 kHz
(Note 3)
Unity Gain Level (Note 4)
Gain Change (Notes 1 and 5)
TA = 0°C to +70°C
Reference Drift (Note 5)
TA = 0°C to +70°C
Resistor Drift (Note 5)
TA = 0°C to +70°C
Tracking Error (measured relative to value at unity gain) Rectifier Input VCC = +6.0 V
equals [VO − VO (unity gain)] dB − V2 dBm
V2 = +6.0 dBm, V1 = 0 dB
V2 = −30 dBm, V1 = 0 dB
Channel Separation
1. Measured at 0 dBm, 1.0 kHz.
2. Expandor AC input change from no signal to 0 dBm.
3. Input to V1 and V2 grounded.
4. 0 dB = 775 mVRMS.
5. Relative to value at TA = 25°C.
Min
6.0
±20
1.7
−1.0
Typ Max
− 24
4.3 4.8
−−
±0.5 −
0.3 1.0
0.05 −
±5 ±15
1.8 1.9
±90 ±150
20 45
0
±0.1
±5.0
+8.0, −5.0
+1.0
±0.2
±10
±0.2 −
+0.2 −0.5, +1.0
60 −
Unit
V
mA
mA
V/ms
%
%
%
V
mV
mV
dBm
dB
mV
%
dB
dB
dB
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NE570 Даташит, Описание, Даташиты
NE570
CIRCUIT DESCRIPTION
The NE570 compandor building blocks, as shown in the
block diagram, are a full−wave rectifier, a variable gain cell,
an operational amplifier and a bias system. The arrangement
of these blocks in the IC result in a circuit which can perform
well with few external components, yet can be adapted to
many diverse applications.
The full−wave rectifier rectifies the input current which
flows from the rectifier input, to an internal summing node
which is biased at VREF. The rectified current is averaged on
an external filter capacitor tied to the CRECT terminal, and
the average value of the input current controls the gain of the
variable gain cell. The gain will thus be proportional to the
average value of the input signal for capacitively−coupled
voltage inputs as shown in the following equation. Note that
for capacitively−coupled inputs there is no offset voltage
capable of producing a gain error. The only error will come
from the bias current of the rectifier (supplied internally)
which is less than 0.1 mA.
G
T
|VIN
*
VREF
R1
|
avg
or
G
T
|
VIN | avg
R1
The speed with which gain changes to follow changes in
input signal levels is determined by the rectifier filter
capacitor. A small capacitor will yield rapid response but
will not fully filter low frequency signals. Any ripple on the
gain control signal will modulate the signal passing through
the variable gain cell. In an expander or compressor
application, this would lead to third harmonic distortion, so
there is a trade−off to be made between fast attack and decay
times and distortion. For step changes in amplitude, the
change in gain with time is shown by this equation.
G(t)
+
(Ginitial
*
Gfinal)
*t
et
)
Gfinal
t + 10kW CRECT
The variable gain cell is a current−in, current−out device
with the ratio IOUT/IIN controlled by the rectifier. IIN is the
current which flows from the DG input to an internal
summing node biased at VREF. The following equation
applies for capacitively−coupled inputs. The output current,
IOUT, is fed to the summing node of the op amp.
IIN
+
VIN * VREF
R2
+
VIN
R2
A compensation scheme built into the DG cell
compensates for temperature and cancels out odd harmonic
distortion. The only distortion which remains is even
harmonics, and they exist only because of internal offset
voltages. The THD trim terminal provides a means for
nulling the internal offsets for low distortion operation.
The operational amplifier (which is internally
compensated) has the non−inverting input tied to VREF, and
the inverting input connected to the DG cell output as well
as brought out externally. A resistor, R3, is brought out from
the summing node and allows compressor or expander gain
to be determined only by internal components.
The output stage is capable of ±20 mA output current.
This allows a +13 dBm (3.5 VRMS) output into a 300 W load
which, with a series resistor and proper transformer, can
result in +13 dBm with a 600 W output impedance.
A bandgap reference provides the reference voltage for all
summing nodes, a regulated supply voltage for the rectifier
and DG cell, and a bias current for the DG cell. The low
tempco of this type of reference provides very stable biasing
over a wide temperature range.
The typical performance characteristics illustration
shows the basic input−output transfer curve for basic
compressor or expander circuits.
+20
+10
0
−10
−20
−30
−40
−50
−60
−70
−80
−40 −30 −20 −10 0 +10
COMPRESSOR OUTPUT LEVEL
OR
EXPANDOR INPUT LEVEL (dBm)
Figure 2. Basic Input−Output Transfer Curve
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