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PDF NSB1706DMW5T1 Data sheet ( Hoja de datos )
| Número de pieza | NSB1706DMW5T1 | |
| Descripción | Dual Bias Resistor Transistor | |
| Fabricantes | ON Semiconductor | |
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NSB1706DMW5T1
Dual Bias Resistor
Transistor
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the NSB1706DMW5T1, two
BRT devices are housed in the SC−88A package which is ideal for low
power surface mount applications where board space is at a premium.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Pb−Free Package is Available
MAXIMUM RATINGS
(TA = 25°C unless otherwise noted, common for Q1 and Q2)
Rating
Collector-Base Voltage
Symbol
VCBO
Value
Unit
www.DataSheet4U.com
50 Vdc
Collector-Emitter Voltage
VCEO 50 Vdc
Collector Current
IC 100 mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 187 (Note 1) mW
256 (Note 2)
1.5 (Note 1) mW/°C
2.0 (Note 2)
Thermal Resistance, Junction-to-Ambient RqJA
670 (Note 1) °C/W
490 (Note 2)
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 250 (Note 1) mW
385 (Note 2)
2.0 (Note 1) mW/°C
3.0 (Note 2)
Thermal Resistance, Junction-to-Ambient RqJA
493 (Note 1) °C/W
325 (Note 2)
Thermal Resistance, Junction-to-Lead
RqJL
188 (Note 1) °C/W
208 (Note 2)
Junction and Storage Temperature
TJ, Tstg −55 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 inch Pad.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 3
1
http://onsemi.com
(5) (4)
Q1 Q2
R2 R2
R1 R1
(1) (2) (3)
1
SC−88A
CASE 419A
STYLE 1
MARKING DIAGRAM
U6 M G
G
1
U6 = Device Marking
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package Shipping†
NSB1706DMW5T1 SC−88A 3000/Tape & Reel
NSB1706DMW5T1G SC−88A 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NSB1706DMW5T1/D
1 page | ||
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| PDF Descargar | [ Datasheet NSB1706DMW5T1.PDF ] | |
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