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Número de pieza | NLAS4052 | |
Descripción | Analog Multiplexer/ Demultiplexer | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NLAS4052 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
No Preview Available ! NLAS4052
Analog Multiplexer/
Demultiplexer
Double–Pole, 4–Position
Plus Common Off
The NLAS4052 is an improved version of the MC14052 and
MC74HC4052 fabricated in sub–micron Silicon Gate CMOS
technology for lower RDS(on) resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to ±3 V to pass a 6 VPP signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings.
• Improved RDS(on) Specifications
• Pin for Pin Replacement for MAX4052 and MAX4052A
– One Half the Resistance Operating at 5.0 Volts
• Single or Dual Supply Operation
– Single 2.5–5 Volt Operation, or Dual ±3 Volt Operation
– With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
– No Translators Needed
– Address and Inhibit pins are Logic is Over–Voltage Tolerant and –
– May Be Driven Up +6 V Regardless of VCC
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• Address and Inhibit pins are Standard TTL Compatible
– Greatly Improved Noise Margin Over MAX4052 and MAX4052A
• Improved Linearity Over Standard HC4052 Devices
• Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
Packages
http://onsemi.com
SO–16
D SUFFIX
CASE 751B
TSSOP–16
DT SUFFIX
CASE 948F
MARKING DIAGRAMS
16 9
NLAS4052
AWLYWW
18
16
NLAS
4052
ALYW
1
9
8
QSOP–16
QS SUFFIX
CASE 492
16
NLAS
4052
ALYW
1
A
WL, L
Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
9
8
ORDERING INFORMATION
Device
NLAS4052DR2
NLAS4052DTR2
NLAS4052QSR
Package Shipping
SO–16 2500 Units/Reel
TSSOP–16 2500 Units/Reel
QSOP–16 2500 Units/Reel
© Semiconductor Components Industries, LLC, 2002
June, 2002 – Rev. 1
1
Publication Order Number:
NLAS4052/D
1 page NLAS4052
AC CHARACTERISTICS (Input tr = tf = 3 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Test Conditions
Guaranteed Limit
VCC
V
VEE
V
–55 to 25°C
Min Typ*
v85°C v125°C Unit
tBBM
Minimum Break–Before–Make VIN = VIL or VIH
3.0 0.0 1.0
6.5
–
– ns
Time
VIS = VCC
4.5 0.0 1.0
5.0
–
–
RL = 300 W, CL = 35 pF
3.0 –3.0 1.0
3.5
–
–
(Figure 19)
*Typical Characteristics are at 25°C.
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 3 ns)
Guaranteed Limit
Symbol
Parameter
VCC
V
VEE
V
–55 to 25°C
Min Typ Max
v85°C
Min Max
tTRANS
Transition Time
(Address Selection Time)
(Figure 18)
2.5 0
3.0 0
4.5 0
3.0 –3.0
22 40
20 28
16 23
16 23
45
30
25
25
tON Turn–on Time
2.5 0
(Figures 14, 15, 20, and 21)
3.0 0
Inhibit to NO or NC
4.5 0
3.0 –3.0
22 40
20 28
16 23
16 23
45
30
25
25
tOFF
Turn–off Time
(Figures 14, 15, 20, and 21)
Inhibit to NO or NC
2.5 0
3.0 0
4.5 0
3.0 –3.0
22 40
20 28
16 23
16 23
45
30
25
25
v125°C
Min Max
50
35
30
28
50
35
30
28
50
35
30
28
Unit
ns
ns
ns
CIN
CNO or CNC
CCOM
C(ON)
Maximum Input Capacitance,Select Inputs
Analog I/O
Common I/O
Feedthrough
Typical @ 25°C, VCC = 5.0 V
8
10
10
1.0
pF
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5
5 Page NLAS4052
Open
Input
DUT
VCC
Output
300 W
VOUT
35 pF
Enable
VCC
Input
0V
Output
VOL
50%
VCC
10%
tOFF
Figure 21. tON/tOFF
50%
10%
tON
Reference
DUT
Input
50 W Generator
Output
50 W
Transmitted
50 W
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒ ǓVOUT
VISO = Off Channel Isolation = 20 Log VIN for VIN at 100 kHz
ǒ ǓVONL = On Channel Loss = 20 Log
VOUT
VIN
for VIN at 100 kHz to 50 MHz
Bandwidth (BW) = the frequency 3 dB below VONL
Figure 22. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
http://onsemi.com
11
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet NLAS4052.PDF ] |
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