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CA3096A PDF даташит

Спецификация CA3096A изготовлена ​​​​«Intersil» и имеет функцию, называемую «NPN/PNP Transistor Arrays».

Детали детали

Номер произв CA3096A
Описание NPN/PNP Transistor Arrays
Производители Intersil
логотип Intersil логотип 

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CA3096A Даташит, Описание, Даташиты
CA3096, CA3096A,
CA3096C
December 1997
NPN/PNP Transistor Arrays
Applications
• Five-Independent Transistors
- Three NPN and
- Two PNP
• Differential Amplifiers
• DC Amplifiers
• Sense Amplifiers
• Level Shifters
• Timers
• Lamp and Relay Drivers
• Thyristor Firing Circuits
• Temperature Compensated Amplifiers
Operational Amplifiers
Ordering Information
PART NUMBER
(BRAND)
CA3096AE
CA3096AM
(3096A)
CA3096AM96
(3096A)
CA3096CE
CA3096E
CA3096M
(3096)
CA3096M96
(3096)
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 16 Ld PDIP
-55 to 125 16 Ld SOIC
PKG.
NO.
E16.3
M16.15
-55 to 125
-55 to 125
-55 to 125
-55 to 125
16 Ld SOIC Tape
and Reel
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
M16.15
E16.3
E16.3
M16.15
-55 to 125 16 Ld SOIC Tape M16.15
and Reel
Pinout
CA3096, CA3096A, CA3096C
(PDIP, SOIC)
TOP VIEW
1 16 SUBSTRATE
2
Q1
3
4
15
Q5 14
13
5 Q2
12
6 Q4 11
7 10
8 Q3
9
Description
The CA3096C, CA3096, and CA3096A are general purpose
high voltage silicon transistor arrays. Each array consists of
five independent transistors (two PNP and three NPN types)
on a common substrate, which has a separate connection.
Independent connections for each transistor permit maxi-
mum flexibility in circuit design.
Types CA3096A, CA3096, and CA3096C are identical, except
that the CA3096A specifications include parameter matching
and greater stringency in ICBO, ICEO, and VCE(SAT). The
CA3096C is a relaxed version of the CA3096.
CA3096, CA3096A, CA3096C
Essential Differences
CHARACTERISTIC
V(BR)CEO (V) (Min)
NPN
PNP
V(BR)CBO (V) (Min)
NPN
PNP
hFE at 1mA
NPN
PNP
hFE at 100µA
PNP
ICBO (nA) (Max)
NPN
PNP
ICEO (nA) (Max)
NPN
PNP
VCE SAT (V) (Max)
NPN
|VIO| (mV) (Max)
NPN
PNP
|IIO| (µA) (Max)
NPN
PNP
CA3096A CA3096
35 35
-40 -40
45 45
-40 -40
150-500
20-200
150-500
20-200
40-250
40-250
40 100
-40 -100
100
-100
1000
-1000
0.5 0.7
5-
5-
0.6 -
0.25 -
CA3096C
24
-24
30
-24
100-670
15-200
30-300
100
-100
1000
-1000
0.7
-
-
-
-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
File Number 595.4









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CA3096A Даташит, Описание, Даташиты
CA3096, CA3096A, CA3096C
Absolute Maximum Ratings
Operating Conditions
NPN
Collector-to-Emitter Voltage, VCEO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 35V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V
Collector-to-Base Voltage, VCBO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Collector-to-Substrate Voltage, VCIO (Note 1)
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Emitter-to-Substrate Voltage, VEIO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . -
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -
Emitter-to-Base Voltage, VEBO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . 6V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Collector Current, IC (All Types) . . . . . . . . . . . . 50mA
PNP Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-55oC to 125oC
-40V
-24V
-40V
-24V
-
-
-40V
-24V
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
125
Maximum Power Dissipation (Each Transistor, Note 3) . . . . . 200mW
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
-40V
-24V
-10mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3096 is isolated from the substrate by an integral diode. The substrate (Terminal 16) must be
connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor
action.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. Care must be taken to avoid exceeding the maximum junction temperature. Use the total power dissipation (all transistors) and thermal
resistances to calculate the junction temperature.
Electrical Specifications For Equipment Design, At TA = 25oC
PARAMETER
TEST
CONDITIONS
CA3096
MIN TYP MAX
DC CHARACTERISTICS FOR EACH NPN TRANSISTOR
ICBO
VCB = 10V,
IE = 0
- 0.001
ICEO
VCE = 10V,
IB = 0
- 0.006
V(BR)CEO
IC = 1mA, IB = 0 35
50
V(BR)CBO
IC = 10µA,
IE = 0
45 100
V(BR)CIO
ICI = 10µA,
IB = IE = 0
45 100
V(BR)EBO
IE = 10µA,
IC = 0
68
VZ
IZ = 10µA
6 7.9
VCE SAT
lC = 10mA,
IB = 1mA
- 0.24
VBE (Note 4)
hFE (Note 4)
IC = 1mA,
VCE = 5V
0.6 0.69
150 390
|VBE/T| (Note 4) IC = 1mA,
VCE = 5V
- 1.9
DC CHARACTERISTICS FOR EACH PNP TRANSISTOR
100
1000
-
-
-
-
9.8
0.7
0.78
500
-
ICBO
VCB = -10V,
IE = 0
- -0.06 -100
CA3096A
MIN TYP MAX
- 0.001 40
- 0.006 100
35 50
45 100
-
-
45 100
-
68 -
6 7.9 9.8
- 0.24 0.5
0.6 0.69 0.78
150 390 500
- 1.9 -
- -0.006 -40
CA3096C
MIN TYP MAX
UNITS
- 0.001 100
nA
- 0.006 1000 nA
24 35
30 80
-
-
V
V
30 80
-
V
68 - V
6 7.9 9.8
- 0.24 0.7
V
V
0.6 0.69 0.78
V
100 390
- 1.9
670
- mV/oC
-
-0.06 -100
nA
2









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CA3096A Даташит, Описание, Даташиты
CA3096, CA3096A, CA3096C
Electrical Specifications For Equipment Design, At TA = 25oC (Continued)
PARAMETER
TEST
CONDITIONS
CA3096
MIN TYP MAX
ICEO
VCE = -10V,
IB = 0
- -0.12
V(BR)CEO
IC = -100µA,
IB = 0
-40 -75
V(BR)CBO
IC = -10µA,
IE = 0
-40 -80
V(BR)EBO
IE = -10µA,
IC = 0
-40 -100
V(BR)ElO
IEI = 10µA,
IB = IC = 0
40 100
VCE SAT
IC = -1mA,
IB = -100µA
- -0.16
VBE (Note 4)
IC = -100µA,
VCE = -5V
-0.5 -0.6
hFE (Note 4)
IC = -100µA,
VCE = -5V
40 85
IC = -1mA,
VCE = -5V
20 47
|VBE/T| (Note 4) IC = -100µA,
VCE = -5V
- 2.2
ICBO
Collector-Cutoff Current
ICEO
Collector-Cutoff Current
V(BR)CEO Collector-to-Emitter Breakdown Voltage
V(BR)CBO Collector-to-Base Breakdown Voltage
V(BR)CIO Collector-to-Substrate Breakdown Voltage
V(BR)EBO Emitter-to-Base Breakdown Voltage
-1000
-
-
-
-
-0.4
-0.7
250
200
-
CA3096A
MIN TYP MAX
- -0.12 -100
CA3096C
MIN TYP MAX
- -0.12 -1000
-40 -75 - -24 -30
-
-40 -80 - -24 -60
-
-40 -100
-
-24 -80
-
40 100 - 24 80
-
- -0.16 -0.4 - -0.16 -0.4
-0.5 -0.6 -0.7 -0.5 -0.6 -0.7
40 85 250 30 85 300
20 47 200 15 47 200
- 2.2 -
- 2.2
-
VZ Emitter-to-Base Zener Voltage
VCE SAT Collector-to-Emitter Saturation Voltage
VBE Base-to-Emitter Voltage
hFE DC Forward-Current Transfer Ratio
|VBE/T| Magnitude of Temperature Coefficient:
(for each transistor)
UNITS
nA
V
V
V
V
V
V
mV/oC
NOTE:
4. Actual forcing current is via the emitter for this test.
Electrical Specifications For Equipment Design At TA = 25oC (CA3096A Only)
CA3096A
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
FOR TRANSISTORS Q1 AND Q2 (AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
|VIO|
VCE = 5V, IC = 1mA
Absolute Input Offset Current
Absolute Input Offset Voltage
Temperature Coefficient
|IIO|
------V----TI--O-----
FOR TRANSISTORS Q4 AND Q5 (AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
Absolute Input Offset Current
Absolute Input Offset Voltage
Temperature Coefficient
|VIO|
|IIO|
------V----TI--O-----
VCE = -5V, IC = -100µA
RS = 0
- 0.3 5 mV
- 0.07 0.6 µA
- 1.1 - µV/oC
- 0.15 5 mV
- 2 250 nA
- 0.54 - µV/oC
3










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