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HI5810 PDF даташит

Спецификация HI5810 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «Sampling A/D Converter».

Детали детали

Номер произв HI5810
Описание Sampling A/D Converter
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HI5810 Даташит, Описание, Даташиты
HI5810
August 1997
CMOS 10 Microsecond, 12-Bit, Sampling
A/D Converter with Internal Track and Hold
Features
• Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µs
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . .100 KSPS
• Built-In Track and Hold
• Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +5V
• Maximum Power Consumption. . . . . . . . . . . . . . .40mW
• Internal or External Clock
• 1MHz Input Bandwidth . . . . . . . . . . . . . . . . . . . . . -3dB
Applications
• Remote Low Power Data Acquisition Systems
• Digital Audio
• DSP Modems
• General Purpose DSP Front End
µP Controlled Measurement Systems
• Process Controls
• Industrial Controls
Description
The HI5810 is a fast, low power, 12-bit, successive-
approximation, analog-to-digital converter. It can operate from
a single 3V to 6V supply and typically draws just 1.9mA when
operating at 5V. The HI5810 features a built-in track and hold.
The conversion time is as low as 10µs with a 5V supply.
The twelve data outputs feature full high speed CMOS three-
state bus driver capability, and are latched and held through a
full conversion cycle. The output is user selectable: [i.e.,
12-bit, 8-bit (MSBs), and/or 4-bit (LSBs)]. A data ready flag,
and conversion-start input complete the digital interface.
An internal clock is provided and is available as an output.
The clock may also be over-driven by an external source.
Ordering Information
PART
NUMBER
HI5810JIP
HI5810KIP
HI5810JIB
HI5810KIB
HI5810JIJ
HI5810KIJ
INL (LSB)
(MAX OVER
TEMP.)
±2.5
±2.0
±2.5
±2.0
±2.5
±2.0
TEMP.
RANGE
(oC)
PACKAGE
PKG.
NO.
-40 to 85 24 Ld PDIP E24.3
-40 to 85 24 Ld PDIP E24.3
-40 to 85 24 Ld SOIC M24.3
-40 to 85 24 Ld SOIC M24.3
-40 to 85 24 Ld CERDIP F24.3
-40 to 85 24 Ld CERDIP F24.3
Pinout
HI5810
(PDIP, CERDIP, SOIC)
TOP VIEW
DRDY 1
(LSB) D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
D8 10
D9 11
VSS 12
24 VDD
23 OEL
22 CLK
21 STRT
20 VREF-
19 VREF+
18 VIN
17 VAA+
16 VAA-
15 OEM
14 D11 (MSB)
13 D10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
6-1777
File Number 3633.1









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HI5810 Даташит, Описание, Даташиты
Functional Block Diagram
VDD
VSS
VIN
TO INTERNAL LOGIC
VREF+
50
SUBSTRATE
VAA+
VAA-
64C
63
P1
32C
16C
8C
4C
2C
C
32C
16C
8C
4C
2C
C
C
VREF -
HI5810
CONTROL
AND
TIMING
CLOCK
12-BIT
SUCCESSIVE
APPROXIMATION
REGISTER
12-BIT EDGE
TRIGGERED
“D” LATCHED
STRT
CLK
DRDY
OEM
D11 (MSB)
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
OEL
6-1778









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HI5810 Даташит, Описание, Даташиты
HI5810
Absolute Maximum Ratings
Supply Voltage
VDD to VSS . . . . . . . . . . . . . . . . . . . . (VSS -0.5V) < VDD < +6.5V
VAA+ to VAA-. . . . . . . . . . . . . . . . . . . . (VSS -0.5V) to (VSS +6.5V)
VAA+ to VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3V
Analog and Reference Inputs
VIN, VREF+, VREF- . . . . . . . . . (VSS -0.3V) < VINA < (VDD +0.3V)
Digital I/O Pins . . . . . . . . . . . . . . (VSS -0.3V) < VI/O < (VDD +0.3V)
Operating Conditions
Temperature Range
PDIP, SOIC, and CERDIP Packages . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
60
12
PDIP Package . . . . . . . . . . . . . . . . . . .
80
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
75
N/A
Maximum Junction Temperature
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Hermetic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications VDD = VAA+ = 5V, VREF+ = +4.608V, VSS = VAA- = VREF - = GND, CLK = External 1.5MHz,
Unless Otherwise Specified
25oC
-40oC TO 85oC
PARAMETER
ACCURACY
Resolution
Integral Linearity Error, INL
(End Point)
Differential Linearity Error, DNL
Gain Error, FSE
(Adjustable to Zero)
Offset Error, VOS
(Adjustable to Zero)
DYNAMIC CHARACTERISTICS
Signal to Noise Ratio, SINAD
RMS Signal
RMS Noise + Distortion
J
K
J
K
J
K
J
K
J
K
Signal to Noise Ratio, SNR
RMS Signal
RMS Noise
J
K
Total Harmonic Distortion, THD
J
K
Spurious Free Dynamic Range, SFDR J
K
ANALOG INPUT
Input Current, Dynamic
TEST CONDITIONS
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
At VIN = VREF+, 0V
MIN TYP MAX MIN
MAX UNITS
12 - - 12
- Bits
-
- ±2.5
-
±2.5 LSB
-
- ±2.0
-
±2.0 LSB
-
- ±2.0
-
±2.0 LSB
-
- ±2.0
-
±2.0 LSB
-
- ±3.5
-
±3.5 LSB
-
- ±2.5
-
±2.5 LSB
-
- ±2.5
-
±2.5 LSB
-
- ±1.5
-
±1.5 LSB
- 68.8 -
62.1
- 71.0 -
63.6
- 70.5 -
63.2
- 71.5 -
65.0
- -73.9 -
-68.4
- -80.3 -
69.7
- 75.4 -
69.2
- 80.9 -
70.7
-
-
-
-
-
-
-
-
- dB
dB
- dB
dB
- dB
dB
- dB
dB
- dBc
dBc
- dBc
dBc
- dB
dB
- dB
dB
- ±125 ±150
-
±150
µA
6-1779










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