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PDF HI-6110 Data sheet ( Hoja de datos )
| Número de pieza | HI-6110 | |
| Descripción | MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor | |
| Fabricantes | Holt Integrated Circuits | |
| Logotipo |  |
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November 2006
HI-6110
MIL-STD-1553 / MIL-STD-1760
BC / RT / MT Message Processor
GENERAL DESCRIPTION
The HI-6110 is a CMOS integrated circuit implementing the
MIL-STD-1553 (1553) data communications protocol
between a host processor and a dual redundant 1553 data
bus. The single chip architecture has a digital section
containing all necessary logic and memory to process and
store the command and data words for one complete 1553
message. The analog section includes dual transceivers
coupled to the 1553 buses through external current mode
transformers. The device is available in an industry
standard 64-pin 9 mm square LPCC package, making it the
smallest dual redundant 1553 interface product on the
market.
The HI-6110 may be configured as a Bus Controller (BC), a
Remote Terminal (RT), a Monitor Terminal (MT), or a
Monitor Terminal with assigned RT address. 16-bit registers
store incoming and outgoing Command, Status and Data
words. Using two 32-word data FIFOs, the HI-6110 can
store the maximum number of 1553 words occurring in any
message. For messages with transmitted data words, data
may be written in advance or on-the-fly. Received data can
be retrieved on-the-fly or all at once after the Valid Message
flag is asserted.
BC message sequences are initiated by a rising edge on
the BCSTART input, or a 0 to 1 transition at the BCSTART
bit in the Control Register. All RT command responses are
automatically initiated after a valid Command Word is
received.
FEATURES
• Monolithic CMOS technology
• 3.3V operation
• Exceptionally low power
• On-chip message buffering
• Selectable master clock frequency
• Dual differential 1553 bus transceivers
• Bus Controller / Remote Terminal /
Monitor Terminal operating modes
• Compliant to MIL-STD-1553B Notice 2
and MIL-STD-1760 Stores Management
APPLICATIONS
• MIL-STD-1553 Terminals
• Flight Control and Monitoring
• ECCM Interfaces
• Stores Management
• Test Equipment
• Sensor Interfaces
• Instrumentation
PIN CONFIGURATION (Top View)
Each bus has a dedicated Manchester encoder and analog
transformer driver. Each driver dissipates less than 200
mW of on-chip power at 100% duty cycle.
Each bus receiver has a dedicated Manchester decoder. In
BC mode, a RCV signal indicates when valid 1553 words
are received. In RT/MT modes, RCV indicates a valid
command received, while the 1553 command decoder
updates a Message register so the external controller can
identify command type and respond appropriately.
Guaranteed by design, the HI-6110 cannot generate
messages exceeding 660uS, the duration of a Command or
Status Word plus 32 contiguous data words.
R/W - 1
CS - 2
D0 - 3
D1 - 4
D2 - 5
D3 - 6
D4 - 7
D5 - 8
D6 - 9
D7 - 10
D8 - 11
D9 - 12
D10 - 13
HI-6110PQI
&
HI-6110PQT
39 - VDDA
38 - BUSA
37 - BUSB
36 - VDDB
35 - BUSB
34 - TXINHB
33 - RCVB
32 - FFEMPTY
31 - RF0 / RCVCMDA
30 - RF1 / RCVCMDB
29 - RFLAG
28 - VALMESS
27 - ERROR
The external host controller reads and writes a simplified
register structure in the HI-6110 over a 16-bit parallel bus.
The system designer has flexibility over many aspects of
configuration. Control and status monitoring can be done in
hardware (by reading/writing control pins) or in software (by
reading/writing register bits).
52 Pin Plastic Quad Flat Pack (PQFP)
See page 35 for 64-Pin LPCC Pin Configuration
(DS6110 Rev. F)
HOLT INTEGRATED CIRCUITS
www.holtic.com
11/06
1 page  
HI-6110 (BUS CONTROLLER MODE)
REGISTER FORMATS (BC Mode)
CONTROL REGISTER (R/W) Write Address: X1XX, Read Address: 1100
XX 0
X 01
MSB 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LSB
The Control Register settings determine HI-6110 operating
mode, clock frequency and the bus enabled for transmit. It can
also be used to address registers for read/write operations, to
assert master reset, and to initiate MIL-STD-1553 message
sequences.
BIT
15
14
13
12
11
10 - 7
6
5-4
3-2
1
0
NAME
-
REPTO
-
CLKSEL
Reserved
RA3:0
-
TRB, TRA
RTMODE,
BCMODE
BCSTART
MR
FUNCTION
Not used in BC mode
Controls the time-out which causes the No Response Error.
0 17 usec Gap (equivalent to 57 usec for 5.2.1.7 of the RT Validation Test Plan)
1 131 usec Gap
Not used in BC mode
Selects the frequency of the HI-6110 external CLK input, as follows:
CLKSEL Value
0 24 MHz
1 12 MHz
This bit must be written to “0”.
Register Address for HI-6110 register and data read and write operations. The register address is defined by
the logical OR of these bits and their corresponding input pins. Writting Control Register bits 10:7 to 0000 is
necessary if the RA0 - RA3 input pins are used for HI-6110 register addressing.
Not used in BC mode
Setting either TRA or TRB to "1" enables transmit on MIL-STD-1553 BUS A or BUS B. Setting both TRA and
TRB selects neither bus. The BC protocol engine connects to the selected, active bus. The 1553 receiver,
Manchester decoder and RCV output signal are still operational on the inactive bus. Valid words received on the
inactive bus can be read without changing active bus by reading the Bus A Word or Bus B Word register.
NOTE: The TXINHA and TXINHB input pins can override bus enablement.
HI-6110 mode select bits. These Control Register bits are logically OR'ed with their corresponding input pins,
allowing the user to select 1553 operating mode under either hardware or software control:
RTMODE BCMODE 1553 OPERATING MODE
00
Bus Monitor (MT), with assigned RT address
01
Bus Controller (BC)
10
Remote Terminal (RT)
11
Bus Monitor (MT), without assigned RT address
If initially reset, writing a "1" to this bit initiates a BC message sequence. This bit should be reset before next
message.
Master Reset. Writing "1" and then “0” to this bit performs the same function as pulsing the MR pin. All register
and data FIFOs are cleared when master reset is asserted. The Control Register is the exception; it is not
affected by Master Reset.
TRANSMIT DATA FIFO (Write only) Write Address: X010
MIL-STD-1553 Message Data Word 15:0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MSB
LSB
The Transmit Data FIFO is 32-words deep and holds MIL-
STD-1553 message data. The FIFO is cleared on Master
Reset.
Message data to be transmitted by the BC may be loaded into
the TRANSMIT DATA FIFO by the host prior to BCSTART.
Any data word must be loaded before mid-parity bit for the
1553 word it follows. Words are transmitted in the order they
are loaded.
RECEIVE DATA FIFO (Read only) Read Address: 0100
MIL-STD-1553 Message Data Word 15:0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MSB
LSB
The Receive Data FIFO is 32-words deep and holds MIL-
STD-1553 message data. The FIFO is cleared by Master
Reset or when BCSTART occurs.
All MIL-STD-1553 data words received by the BC are stored in
the Receive DATA FIFO. A low FFEMPTY flag (output pin or
Status register bit) means message data is available to be
read by the host. Successive data reads cause FFEMPTY to
go high when the last word is read.
HOLT INTEGRATED CIRCUITS
5
5 Page 
HI-6110 (BUS CONTROLLER MODE)
EXAMPLE BC MIL-STD-1553 MESSAGE SEQUENCES
Example 7. Broadcast BC to RT(s) Transfer
Host Write Data FIFO (Data Word 3)
Host Write Data FIFO (Data Word 2)
Host Write Data FIFO (Data Word 1)
Host Write CW1 (Command Word)
The HI-6110 Bus Controller issues a Broadcast Receive
Command with 3 data words to all Remote Terminals.
STR
BCSTART
MIL-STD-1553 Bus
Receive
Command
Data
Word 1
Data
Word 2
From HI-6110 Bus Controller
Data
Word 3
VALMESS
Example 8. Broadcast RT to RT(s) Transfer
Host Write CW2 (Transmit Command)
Host Write CW1 (Receive Command)
The HI-6110 Bus Controller issues a Broadcast RT to RT transfer
Command with 2 data words to a Remote Terminal on the bus.
The RT broadcasts the message and the Bus Controller validates
the RT response. The transmitted data words are captured by the
HI-6110 Bus Controller and may be read by the host controller.
Host Read Data FIFO (Data Word 2)
Host Read Data FIFO (Data Word 1)
Host Read SW2 (Status Word Tx)
STR
BCSTART
MIL-STD-1553 Bus
VALMESS
Receive
Command
Transmit
Command
From HI-6110 Bus Controller
Status
Word (Tx)
Data
Word 1
Data
Word 2
From Transmitting RT
Example 9. Broadcast Mode Code without Data Word The HI-6110 Bus Controller issues a Broadcast Mode Command
without data word to all Remote Terminals on the bus.
Host Write CW1 (Command Word)
STR
BCSTART
MIL-STD-1553 Bus
Mode Code
Command
From HI-6110 BC
VALMESS
Example 10. Broadcast Mode Code with Data Word
Host Write Data FIFO (Mode Data)
Host Write CW1 (Command Word)
The HI-6110 Bus Controller issues a Broadcast Mode Command
with data word to all Remote Terminals on the bus.
STR
BCSTART
MIL-STD-1553 Bus
VALMESS
Mode Code
Command
Mode
Data
From HI-6110 BC
HOLT INTEGRATED CIRCUITS
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HI-6110.PDF ] | |
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