|
|
PDF HCPL2730 Data sheet ( Hoja de datos )
| Número de pieza | HCPL2730 | |
| Descripción | (HCPL2730 / HCPL2731) Low Input Current High Gain Split Darlington Optocouplers | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HCPL2730 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
|
No Preview Available !
Single-Channel: 6N138, 6N139
Dual-Channel: HCPL2730, HCPL2731
Low Input Current High Gain Split
Darlington Optocouplers
April 2007
tm
www.DataSheet4U.com
Features
■ Low current – 0.5mA
■ Superior CTR-2000%
■ Superior CMR-10kV/µs
■ CTR guaranteed 0–70°C
■ U.L. recognized (File # E90700)
■ VDE recognized (File # 120915) Ordering option V,
e.g., 6N138V
■ Dual Channel – HCPL2730, HCPL2731
Applications
■ Digital logic ground isolation
■ Telephone ring detector
■ EIA-RS-232C line receiver
■ High common mode noise line receiver
■ µP bus isolation
■ Current loop receiver
Description
The 6N138/9 and HCPL2730/HCPL2731 optocouplers
consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector.
The split darlington configuration separating the input
photodiode and the first stage gain from the output
transistor permits lower output saturation voltage and
higher speed operation than possible with conventional
darlington phototransistor optocoupler. In the dual
channel devices, HCPL2730/HCPL2731, an integrated
emitter-base resistor provides superior stability over
temperature.
The combination of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
CMOS, LSTTL and EIA RS232C, while output compati-
bility is ensured to CMOS as well as high fan-out TTL
requirements. An internal noise shield provides excep-
tional common mode rejection of 10 kV/µs.
Schematic
Package
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7V
B
6V
O
5 GND
+1
V
F1
_2
_3
V
F2
+4
8
V
CC
7
V
01
6V
02
5 GND
6N138 / 6N139
HCPL2730 / HCPL2731
8
1
8
1
8
1
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
1 page  
Isolation Characteristics (TA = 0 to 70°C unless otherwise specified)
Symbol
Characteristics
Test Conditions
Min.
II-O
VISO
RI-O
CI-O
II-I
RI-I
CI-I
Input-output
insulation leakage current
(Note 4)
Withstand insulation test voltage
(Note 4)
Resistance (input to output)
(Note 4)
Capacitance (input to output)
(Note 4, 5)
Input-Input
Insulation leakage current
(Note 6)
Input-Input Resistance
(Note 6)
Input-Input Capacitance
(Note 6)
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000VDC)
(RH ≤ 50%, TA = 25°C, II-O ≤ 2µA)
( t = 1 min.)
(VI-O = 500VDC)
2500
(f = 1MHz)
(RH ≤ 45%, VI-I = 500VDC)
t = 5 s, (HCPL2730/2731 only)
(VI-I = 500VDC)
(HCPL2730/2731 only)
(f = 1 MHz)
(HCPL2730/2731 only)
** All Typicals at TA = 25°C
Typ.* Max.
1.0
1012
0.6
0.005
1011
0.03
Unit
µA
VRMS
Ω
pF
µA
Ω
pF
Notes:
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. (6N138 and 6N139 only)
3. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dVcm/dt on the leading edge of
the common mode pulse signal VCM, to assure that the output will remain in a logic HIGH state (i.e., VO > 2.0V). Common
mode transient immunity in logic LOW level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic LOW state (i.e., VO < 0.8V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted
together.
5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shor ted
together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
5
www.fairchildsemi.com
5 Page 
Pulse
Generator
tr = 5ns
Z O = 50 V
10% D.C.
I/ f< 100ns
IF
Noise
Shield
1
2
VF
3
IF Monitor
Rm
4
8 VCC
7 VB
+5 V
RL
Pulse
Generator
tr = 5ns
Z O = 50V
IF
10% DUTY CYCLE
I/f < 100 µS
+
1
VF1
-2
6 VO
0.1 µF
5
GND
VO
CL = 15 pF*
IF
MONITOR
Rm
-3
VF2
+4
Noise
Shield
VCC
8
RL
V01
7
V02
6
GND
5
0.1 µF
+5 V
VO
CL = 15 pF*
Test Circuit for 6N138, 6N139
IF
Test Circuit for HCPL2730 and HCPL2731
VO 5 V
TPHL
1.5 V
1.5 V
VOL
TPLH
Fig. 24 Switching Time Test Circuit
IF
A
B
VFF
Noise
Shield
1
2
VF
3
4
8 VCC
+5 V
7 VB
RL
6 VO
GND
5
0.1 µF
VO
-
+ V-CM
Pulse Gen
IF
B
VFF
A
Test Circuit for 6N138 and 6N139
VCM 10 V
10%
0V
tr
90% 90%
+1
VF1
-2
Noise
Shield
-3
VF2
+
4
VCC
8
RL
V01
7
V02
6
GND
5
VCM
+-
Pulse Gen
Test Circuit for HCPL2730 and HCPL2731
10%
tf
+5 V
VO
0.1 µF
VO
Switch at A : IF = 0 mA
VO
Switch at B : IF = 1.6 mA
5V
VOL
Fig. 25 Common Mode Immunity Test Circuit
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HCPL2730.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HCPL2730 | Dual Channel Low Input Current/ High Gain Optocouplers | .gif){kind=logo} Agilent(Hewlett-Packard) |
| HCPL2730 | Dual-Channel Optocouplers/Optoisolators |  Texas Instruments |
| HCPL2730 | (HCPL2730 / HCPL2731) Low Input Current High Gain Split Darlington Optocouplers | Fairchild Semiconductor |
| HCPL2731 | Dual Channel Low Input Current/ High Gain Optocouplers | Agilent(Hewlett-Packard) |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |