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HI1171 PDF даташит

Спецификация HI1171 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «High Speed D/A Converter».

Детали детали

Номер произв HI1171
Описание High Speed D/A Converter
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HI1171 Даташит, Описание, Даташиты
HI1171
August 1997
8-Bit, 40 MSPS, High Speed D/A Converter
Features
Description
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . . 40MHz
• Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-Bit
• Integral Linearity Error . . . . . . . . . . . . . . . . . . 0.25 LSB
• Low Glitch Noise
• Single Supply Operation . . . . . . . . . . . . . . . . . . . . . . +5V
• Low Power Consumption (Max) . . . . . . . . . . . . . .80mW
• Evaluation Board Available (HI1171-EV)
• Direct Replacement for the Sony CXD1171
Applications
• Wireless Telecommunications
The HI1171 is an 8-bit, 40MHz, high speed D/A converter.
The converter incorporates an 8-bit input data register with
blanking capability, and current outputs. The HI1171 fea-
tures low glitch outputs. The architecture is a current cell
arrangement to provide low linearity errors.
The HI1171 is available in an Industrial temperature range
and is offered in a 24 lead (200 mil) SOIC plastic package.
For dual version, please refer to the HI1177 Data Sheet.
For triple version, please refer to the HI1178 Data Sheet.
Ordering Information
PART
NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG. NO.
• Signal Reconstruction
HI1171JCB
-40 to 85 24 Ld SOIC M24.2-S
• Direct Digital Synthesis
• Imaging
HI1171-EV
25 Evaluation Board
• Presentation and Broadcast Video
• Graphics Displays
www.DataSheet4U.com
• Signal Generators
Pinout
HI1171
(SOIC)
TOP VIEW
(LSB) D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
BLNK 9
DVSS 10
VB 11
CLK 12
24 DVDD
23 DVDD
22 AVDD
21 IOUT2
20 IOUT1
19 AVDD
18 AVDD
17 VG
16 VREF
15 IREF
14 AVSS
13 DVSS
Typical Application Circuit
+5V
HI1171
+5V
0.1µF
DVDD (23, 24)
(18, 19, 22) AVDD
0.1µF
D7
D7 (MSB)(8)
(17) VG
0.1µF
D6 D6 (7)
D5 D5 (6)
(16) VREF
1k
D4 D4 (5)
D3 D3 (4)
D2 D2 (3)
D1 D1 (2)
(20) IOUT1
D0 D0 (LSB) (1)
D/A
OUT
200
0.1µF
CLK (12)
VB (11)
BLNK (9)
DVSS (10, 13)
(15) IREF
(21) IOUT2
(14) AVSS
3.3k
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 3662.2









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HI1171 Даташит, Описание, Даташиты
Functional Block Diagram
HI1171
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
BLNK
VB
CLK
DECODER
DECODER
CLOCK
GENERATOR
8-BIT
LATCH
6 MSBs
CURRENT
CELLS
CURRENT CELLS
(FOR FULL SCALE)
BIAS VOLTAGE
GENERATOR
2 LSBs
CURRENT
CELLS
-
+
IOUT2
IOUT1
VG
VREF
IREF
2









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HI1171 Даташит, Описание, Даташиты
HI1171
Absolute Maximum Ratings
Digital Supply Voltage DVDD to DVSS . . . . . . . . . . . . . . . . . . . +7.0V
Analog Supply Voltage AVDD to AVSS . . . . . . . . . . . . . . . . . . +7.0V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0mA to 15mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
98
Maximum Junction Temperature, Plastic Package . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
ACVLDKDP=uls+e4.W75idVthto=+152.2.55nVs,,DTVAD=D2=5o+C4.7(N5ottoe
+5.25V,
4)
VREF
=
+2.0V,
fS
=
40MHz,
PARAMETER
TEST CONDITIONS
MIN TYP MAX
SYSTEM PERFORMANCE
Resolution, n
-8-
Integral Linearity Error, INL
Differential Linearity Error, DNL
Offset Error, VOS
Full Scale Error, FSE (Adjustable to Zero)
fS = 40MHz (End Point)
fS = 40MHz
(Note 2)
(Note 2)
-0.5 -
1.3
- - ±0.25
- -1
- - ±13
Full Scale Output Current, IFS
Full Scale Output Voltage, VFS
Output Voltage Range, VFSR
DYNAMIC CHARACTERISTICS
- 10 15
1.9 2.0 2.1
0.5 2.0 2.1
Throughput Rate
See Figure 7
40.0 -
-
Glitch Energy, GE
Differential Gain, AV (Note 3)
Differential Phase, ∆φ (Note 3)
ROUT = 75
- 30 -
- 1.2 -
- 0.5 -
REFERENCE INPUT
Voltage Reference Input Range
0.5 - 2.0
Reference Input Resistance
(Note 3)
1.0 -
-
DIGITAL INPUTS
Input Logic High Voltage, VIH
Input Logic Low Voltage, VIL
Input Logic Current, IIL, IIH
Digital Input Capacitance, CIN
TIMING CHARACTERISTICS
(Note 3)
(Note 3)
(Note 3)
(Note 3)
3.0 -
-
- - 1.5
- - ±5.0
- 5.0 -
Data Setup Time, tSU
Data Hold Time, tHLD
See Figure 1
See Figure 1
5-
10 -
-
-
UNITS
Bits
LSB
LSB
mV
LSB
mA
V
V
MHz
pV-s
%
Degree
V
M
V
V
µA
pF
ns
ns
3










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