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PDF W25P80 Data sheet ( Hoja de datos )
| Número de pieza | W25P80 | |
| Descripción | (W25P80 / W25P16) 8M-BIT AND 16M-BIT SERIAL FLASH MEMORY | |
| Fabricantes | Winbond | |
| Logotipo |  |
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W25P80 AND W25P16
www.DataSheet4U.com
8M-BIT AND 16M-BIT
SERIAL FLASH MEMORY
Formally NexFlash NX25P80 and NX25P16
The Winbond W25P80/16 are fully compatible with the previous NexFlash
NX25P80/16 Serial Flash memories.
Publication Release Date: September 22, 2006
- 1 - Revision L
1 page  
3. PIN CONFIGURATION 208-MIL
W25P80 AND W25P16
Figure 1a. W25P80/16 Pin Assignments, 8-pin SOIC 208-mi
4. PIN DESCRIPTION 208-MIL
PIN NO.
1
2
3
4
5
6
7
8
PIN NAME
/CS
DO
/WP
GND
DI
CLK
/HOLD
VCC
I/O
I
O
I
I
I
I
Chip Select Input
Data Output
Write Protect Input
Ground
Data Input
Serial Clock Input
Hold Input
Power Supply
FUNCTION
Publication Release Date: September 22, 2006
- 5 - Revision L
5 Page 
W25P80 AND W25P16
9.1.3 Block Protect Bits (BP2, BP1, BP0)
The Block Protect Bits (BP2, BP1, BP0) are non-volatile read/write bits in the status register (S4, S3,
S2) that provide Write Protection control and status. Block Protect bits can be set using the Write
Status Register Instruction (see tW in AC characteristics). All, none or a portion of the memory array
can be protected from Program and Erase instructions (see Status Register Memory Protection table).
The factory default setting for the Block Protection Bits is 0, none of the array protected. The Block
Protect bits can not be written to if the Status Register Protect (SRP) bit is set to 1 and the Write
Protect (/WP) pin is low.
9.1.4 Reserved Bits
Status register bit locations 5 and 6 are reserved for future use. Current devices will read 0 for these
bit locations. It is recommended to mask out the reserved bit when testing the Status Register. Doing
this will ensure compatibility with future devices.
9.1.5 Status Register Protect (SRP)
The Status Register Protect (SRP) bit is a non-volatile
read/write bit in the status register (S7) that can be used in conjunction with the Write Protect (/WP)
pin to disable writes to the status register. When the SRP bit is set to a 0 state (factory default) the
/WP pin has no control over the status register. When the SRP pin is set to a 1, the Write Status
Register instruction is locked out while the /WP pin is low. When the /WP pin is high the Write Status
Register instruction is allowed.
Figure 3. Status Register Bit Locations
Publication Release Date: September 22, 2006
- 11 -
Revision L
11 Page | ||
| Páginas | Total 43 Páginas | |
| PDF Descargar | [ Datasheet W25P80.PDF ] | |
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