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PDF NLAST4599 Data sheet ( Hoja de datos )

Número de pieza NLAST4599
Descripción Low Voltage Single Supply SPDT Analog Switch
Fabricantes ON Semiconductor 
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NLAST4599
Low Voltage Single Supply
SPDT Analog Switch
The NLAST4599 is an advanced high speed CMOS single pole −
double throw analog switch fabricated with silicon gate CMOS
technology. It achieves high speed propagation delays and low ON
resistances while maintaining low power dissipation. This switch
controls analog and digital voltages that may vary across the full
power−supply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much
lower and more linear over input voltage than RON of typical CMOS
analog switches.
The channel select input structure provides protection when
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage − input/output voltage mismatch, battery backup,
hot insertion, etc.
Features
Select Pin Compatible with TTL Levels
Channel Select Input Over−Voltage Tolerant to 5.5 V
Fast Switching and Propagation Speeds
Break−Before−Make Circuitry
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latch−up Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; MM > 200 V
Chip Complexity: 38 FETs
Pb−Free Packages are Available
http://onsemi.com
MARKING
DIAGRAMS
TSOP−6
DT SUFFIX
CASE 318G
A1AYWG
G
1
SC−88/SC−70/SOT−363
DF SUFFIX
CASE 419B
1
A1 M G
G
A1 = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position and underbar
may vary depending upon manufacturing location.
SELECT 1
V+ 2
GND 3
6 NO
5 COM
4 NC
Figure 1. Pin Assignment
CHANNEL SELECT
COM
2X0
2X1
Figure 2. Logic Symbol
NO
NC
Select
L
H
FUNCTION TABLE
ON Channel
NC
NO
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 8
1
Publication Order Number:
NLAST4599/D

1 page




NLAST4599 pdf
NLAST4599
VCC
0.1 mF
DUT
Output
300
W
VOUT
35 pF
VCC
Input
GND
Output
90%
Switch Select Pin
GND
Figure 4. tBBM (Time Break−Before−Make)
tBMM
90% of VOH
VCC
0.1 mF
Open
DUT
Output
300
W
Input
VOUT
35 pF
VCC
Input
0V
Output
VOL
Figure 5. tON/tOFF
50%
VOH
90%
tON
50%
90%
tOFF
Open
Input
DUT
VCC
Output
300 W
VOUT
35 pF
VCC
Input
0V
Output
VOL
50%
VOH
10%
tOFF
Figure 6. tON/tOFF
50%
10%
tON
http://onsemi.com
5

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NLAST4599 arduino
NLAST4599
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE S
D
65 4
HE
12 3
E
b
e
0.05 (0.002)
A1
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
q
c
L
MILLIMETERS
DIM MIN NOM MAX
A 0.90
1.00
1.10
A1 0.01
0.06
0.10
b 0.25 0.38 0.50
c 0.10 0.18 0.26
D 2.90
3.00
3.10
E 1.30 1.50 1.70
e 0.85 0.95 1.05
L 0.20 0.40 0.60
H E 2.50 2.75 3.00
q 0°
− 10°
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
INCHES
NOM
0.039
0.002
0.014
0.007
0.118
0.059
0.037
0.016
0.108
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
SOLDERING FOOTPRINT*
2.4
0.094
1.9
0.075
0.95
0.037
0.95
0.037
0.7
0.028
1.0
0.039
ǒ ǓSCALE 10:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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