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Номер произв W83194BR-911
Описание STEPLESS VIA PT/PM MAIN CLOCK GENERATOR
Производители Winbond
логотип Winbond логотип 

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W83194BR-911 Даташит, Описание, Даташиты
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W83194BR-911
W83194BG-911
Winbond STEPLESS VIA PT/PM
MAIN CLOCK GENERATOR
Date: Mar/22/2006
Revision: 0.71







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W83194BR-911 Даташит, Описание, Даташиты
W83194BR-911, W83194BG-911
STEPLESS CLOCK FOR VIA PT/PM CHIPSET
W83194BR-911/W83195BG-911 Data Sheet Revision History
PAGES
DATES
VERSION
WEB
VERSION
MAIN CONTENTS
1
All of the versions before 0.50 are for
internal use.
2 n.a. 08/28/03 0.5
n.a. First published preliminary version.
3 6 10/28/03
4 7,8,9,19 12/18/03
5 12/05/05
0.6
0.7
0.71
n.a. Modify frequency table
n.a.
Correction IC version, correction some
description and default value
n.a Add Pb-free part no:W83194BG-911
6
7
8
9
10
Please note that all data and specifications are subject to change without notice. All
the trademarks of products and companies mentioned in this data sheet belong to
their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or
systems where malfunction of these products can reasonably be expected to result
in personal injury. Winbond customers using or selling these products for use in such
applications do so at their own risk and agree to fully indemnify Winbond for any
damages resulting from such improper use or sales.
Publication Release Date: March 2006
- I - Revision 0.71







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W83194BR-911 Даташит, Описание, Даташиты
W83194BR-911, W83194BG-911
STEPLESS CLOCK FOR VIA PT/PM CHIPSET
Table of Content-
1. GENERAL DESCRIPTION .............................................................................................................. 1
2. PRODUCT FEATURES................................................................................................................... 1
3. PIN CONFIGURATION.................................................................................................................... 2
4. BLOCK DIAGRAM........................................................................................................................... 2
5. PIN DESCRIPTION ......................................................................................................................... 3
5.1 Crystal I/O...........................................................................................................................................3
5.2 CPU, AGP, and PCI Clock Outputs...................................................................................................3
5.3 Fixed Frequency Outputs...................................................................................................................4
5.4 I2C Control Interface...........................................................................................................................4
5.5 Power Management Pins...................................................................................................................5
5.6 IREF selects Function........................................................................................................................5
5.7 Power Pins .........................................................................................................................................5
6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE..................................................... 6
7. I2C CONTROL AND STATUS REGISTERS.................................................................................... 7
7.1 Register 0: Frequency Select (Default = 10h)...................................................................................7
7.2 Register 1: CPU Clock (1 = Enable, 0 = Stopped) (Default: E2h)....................................................7
7.3 Register 2: PCI Clock (1 = Enable, 0 = Stopped) (Default: FFh)......................................................7
7.4 Register 3: PCI, AGP Clock (1 = Enable, 0 = Stopped) (Default: FFh)............................................8
7.5 Register 4: 24_48MHz, 48MHz, REF, 25MHz Control (1 = Enable, 0 = Stopped) (Default: BFh)..8
7.6 Register 5: Watchdog Control (Default: 02h) ....................................................................................9
7.7 Register 6: Reserved (Default: 50h) (Read Only) .............................................................................9
7.8 Register 7: Winbond Chip ID (Default: 70h) (Read Only)...............................................................10
7.9 Register 8: M/N Program (Default: 90h)..........................................................................................10
7.10 Register 9: M/N Program (Default: 7Ah) .........................................................................................10
7.11 Register 10: M/N Program (Default: BBh).......................................................................................11
7.12 Register 11: Spread Spectrum Programming (Default: 0Bh) .........................................................11
7.13 Register 12: Divisor and Step-less Enable Control (Default: FBh).................................................11
7.14 Table-2 CPU, AGP, PCI divider ratio selection Table.....................................................................12
7.15 Register 13: Divisor and Step-less Enable Control (Default: 0Fh) .................................................12
7.16 Register 14: Control (Default: 0Ah)..................................................................................................12
7.17 Register 15: SST & Skew Control (Default: 2Ch) ...........................................................................13
7.18 Register 16: Skew Control (Default: 24h)........................................................................................13
7.19 Register 17: Slew rate Control (Default: 00h)..................................................................................13
7.20 Register 18: Slew rate Control (Default: 00h)..................................................................................14
7.21 Register 19: Slew Rate Control (Default: D2h) ...............................................................................14
7.22 Register 20: Watch dog timer (Default: 08h)...................................................................................14
7.23 Register21: Fix mode Control (Default: 00h)...................................................................................15
- II -










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