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PDF HD66704 Data sheet ( Hoja de datos )

Número de pieza HD66704
Descripción Liquid Crystal Display Controller/Driver
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HD66704
(Graphics LCD Controller/Driver
with Two 16-Character Lines and 160 Segments)
ADE-207-331(Z)
Rev 2.0
June 2001
Description
The HD66704 LCD controller and driver LSI is used to display alphanumeric characters, katakana, hiragana,
a variety of symbols, and seven-segment numerals. It can be connected to a high-performance microcomputer
via a high-speed clock-synchronized serial connection or on a four-bit bus. The HD66704 is capable of
displaying two 16-character lines and 160 segments or one 16-character line and 240 segments in its character
mode. The HD66704 has 432 built-in fonts for character display and supports double-height display. In its
segment mode, it can drive up to 320 segments (at a duty cycle of 1/4). Segment-by-segment control of a
blinking state, as well as the on/off state, is available.
The HD66704 applies various techniques for reducing the power consumption of an LCD system. These
include low-voltage operation at 1.8 V or less, a booster to generate a maximum of triple the LCD-drive
voltage from the supplied voltage, and voltage-followers to decrease the flow of direct current into the LCD-
drive bleeder-resistors.
The HD66704 has a slim-chip configuration and interface-signal alignment that make it appropriate for chip-
on-glass (COG) mounting. It is suitable for any product in which an LCD display may be used, such as
facsimiles, telephones, pagers, audio equipment, video tape recorders, and electronic wallets.
Features
Two 16-character lines (5-by-8-dot fonts) and 160 segments
320 segments with blinking control (at 1/4-duty drive)
Wide range of operating voltages
VCC = 1.8 to 5.5 V (LCD drive voltage: VLCD = 3.0 to 6.5 V)
Double or triple step-up circuit for LCD drive voltage
1/2- to 1/5-bias bleeder-resistors and voltage followers for LCD-drive power supply
25-level electronic potentiometer
High-speed clock-synchronized serial interface (5 MHz) and high-speed 4-bit bus interface
Continuous writing of data thanks to the zero instruction-execution time (wait-free writing)
80 × 8-bit display data RAM (80 characters max)
17,280-bit (5 × 8 dots : 432 characters) character generator ROM

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HD66704 pdf
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LCD-II Family Comparison (cont)
Items
Character display sizes
Graphic display sizes
Multiplexing icons
Annunciator
Key scan control
LED control ports
General output ports
Operating power voltages
Liquid crystal drive voltages
Serial bus
Parallel bus
Expansion driver control
Liquid crystal drive duty ratios
HD66726
16 characters x 5 lines
96 x 42 dots
192
1/2 duty: 192
8x4
3
1.8 V to 5.5 V
4.5 V to 11 V
Clock-synchronized serial
4 bits, 8 bits
Impossible
1/2, 10, 18, 26, 34, 42
Liquid crystal drive biases
Liquid crystal drive waveforms
Liquid crystal voltage booster
Bleeder-resistor for liquid crystal drive
Liquid crystal drive operational amplifier
Liquid crystal contrast adjuster
Horizontal smooth scroll
Vertical smooth scroll
Double-height display
DDRAM
CGROM
CGRAM
SEGRAM
No. of CGROM fonts
No. of CGRAM fonts
Font sizes
Bit map areas
R-C oscillation resistor/
oscillation frequency
Reset function
Low power control
SEG/COM direction switching
QFP package
TQFP package
TCP package
Bare chip
Bumped chip
No. of pins
Chip sizes
Pad intervals
1/2 to 1/8
B
Single, double, triple, or
quadruple
Incorporated (external)
Incorporated
Incorporated
Line unit
Yes
80 x 8
20,736
480 x 8
96 x 8
240 + 192
64
6x8
96 x 42
External resistor (50 kHz)
External
Partial display off
Display off
Oscillation off
Liquid crystal power off
Key wake-up interrupt
SEG, COM
TCP-188
Yes
Yes
188
13.13 x 2.51
100 µm
HD66728
16 characters x 10 lines
112 x 80 dots
8x4
3
1.8 V to 5.5 V
4.5 V to 15 V
Clock-synchronized serial
4 bits, 8 bits
Impossible
1/8, 16, 24, 32, 40, 48, 56,
64, 72, 80
1/4 to 1/10
B, C
Triple, quadruple, or
quintuple
Incorporated (external)
Incorporated
Incorporated
Line unit
Yes
160 x 8
20,736
1,120 x 8
240 + 192
64
6x8
112 x 80
External resistor (70 to 90
kHz)
External
Partial display off
Display off
Oscillation off
Liquid crystal power off
Key wake-up interrupt
SEG, COM
TCP-243
Yes
243
13.67 x 2.78
70 µm
HD66704
5

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Table 2 Pin Functional Description (cont)
HD66704
Signals
Number of
Pins
I/O
Connected to Functions
SEG1/80– 80
SEG80/1
O LCD
Segment output signals for segment-icon display and
character/graphics display. In the sleep mode (SLP =
1) or standby mode (STB = 1), all pins output GND
level.
The SGS bit can change the shift direction of the
segment signal. For example, if SGS = 0, SEG1/80 is
SEG1. If SGS = 1, SEG1/80 is SEG80.
V1OUT– 5
V5OUT
O Open
Used for output from the internal operational
amplifiers. If the display quality is poor, attach a
capacitor to stabilize the output.
VLCD
Vcc
GND
7
6
8
— Power supply Power supply for LCD drive. VLCD – GND = 6.5 V max.
Input a voltage greater than VCC.
— Power supply VCC = +1.8 V to +5.5 V
— GND
GND (logic) = 0 V
OSC1,
OSC2
2
I or O
Oscillation
resistor or clock
For R-C oscillation using an external resistor, connect
an external resistor. For R-C oscillation using an
internal resistor, connect R1-R3 to OSC2 and leave
OSC1 disconnected. For external clock supply, input
clock pulses to OSC1.
R1–R3
3
O OSC2
For R-C oscillation using an internal resistor, adjust
the internal resistor value. Fluctuation of the resistor
value is _30% of the reference value. Care must be
taken to avoid fluctuation of the frame frequency in
crystal display drive operation.
VLOUT 5
O VLCD pin/booster Potential difference between VCC and GND is boosted
capacitance twice or three times and then output.
C1+, C1– 16
— Booster
External capacitance should be connected here when
capacitance using the double or triple booster.
C2+, C2– 10
— Booster
External capacitance should be connected here when
capacitance using the triple booster. Must be left disconnected
only when using the double booster.
RESET* 1
I MPU or external Reset pin. Initializes the LSI when low.
R-C circuit
Must reset after power-on.
VccDUM 1
GNDDUM 1
O Input pins
O Input pins
Outputs the internal VCC level; shorting this pin sets
the adjacent input pin to the VCC level.
Outputs the internal GND level; shorting this pin sets
the adjacent input pin to the GND level.
TEST
1
I GND
Test pin. Must be fixed at GND level.
VTEST 1
I Open
Test pin for the operational amplifier. Must be left
disconnected.
11

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