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PDF MAX1473 Data sheet ( Hoja de datos )

Número de pieza MAX1473
Descripción ASK Superheterodyne Receiver
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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19-2748; Rev 3; 11/03
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
General Description
The MAX1473 fully integrated low-power CMOS super-
heterodyne receiver is ideal for receiving amplitude-
shift-keyed (ASK) data in the 300MHz to 450MHz
frequency range. Its signal range is from -114dBm to
0dBm. With few external components and a low-current
power-down mode, it is ideal for cost- and power-sensi-
tive applications typical in the automotive and consumer
markets. The chip consists of a low-noise amplifier
(LNA), a fully differential image-rejection mixer, an on-
chip phase-locked-loop (PLL) with integrated voltage-
controlled oscillator (VCO), a 10.7MHz IF limiting
amplifier stage with received-signal-strength indicator
(RSSI), and analog baseband data-recovery circuitry.
The MAX1473 also has a discrete one-step automatic
gain control (AGC) that drops the LNA gain by 35dB
when the RF input signal is greater than -57dBm.
The MAX1473 is available in 28-pin TSSOP and 32-pin
thin QFN packages. Both versions are specified for the
extended (-40°C to +85°C) temperature range.
Applications
Automotive Remote Keyless Entry Security Systems
Garage Door Openers
Home Automation
Remote Controls
Wireless Sensors
Local Telemetry
Systems
Features
o Optimized for 315MHz or 433MHz ISM Band
o Operates from Single 3.3V or 5.0V Supplies
o High Dynamic Range with On-Chip AGC
o Selectable Image-Rejection Center Frequency
o Selectable x64 or x32 fLO/fXTAL Ratio
o Low 5.2mA Operating Supply Current
o <2.5µA Low-Current Power-Down Mode for
Efficient Power Cycling
o 250µs Startup Time
o Built-In 50dB RF Image Rejection
o Receive Sensitivity of -114dBm
PART
MAX1473EUI
MAX1473ETJ
Ordering Information
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 TSSOP
32 Thin QFN
Functional Diagram and Typical Application Circuit appear
at end of data sheet.
Pin Configurations
TOP VIEW
XTAL1 1
AVDD 2
LNAIN 3
LNASRC 4
AGND 5
LNAOUT 6
AVDD 7
MIXIN1 8
MIXIN2 9
AGND 10
IRSEL 11
MIXOUT 12
DGND 13
DVDD 14
MAX1473
TSSOP
28 XTAL2
27 PWRDN
26 PDOUT
25 DATAOUT
24 VDD5
23 DSP
22 DFFB
21 OPP
20 DSN
19 DFO
18 IFIN2
17 IFIN1
16 XTALSEL
15 AGCDIS
N.C.
AGND
LNAOUT
AVDD
MIXIN1
MIXIN2
AGND
IRSEL
1
2
3
4
5
6
7
8
MAX1473
24 DATAOUT
23 VDD5
22 DSP
21 N.C.
20 DFFB
19 OPP
18 DSN
17 DFO
THIN QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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MAX1473 pdf
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315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, VDD = 3.0V to 3.6V, all RF inputs are referenced to 50, fRF = 315MHz, TA = -40°C to +85°C, unless oth-
erwise noted. Typical values are at VDD = 3.3V and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
DATA FILTER
Maximum Bandwidth
DATA SLICER
BWDF
100 kHz
Comparator Bandwidth
BWCMP
100 kHz
Maximum Load Capacitance
CLOAD
10 pF
Output High Voltage
Output Low Voltage
VDD5
0
V
V
CRYSTAL OSCILLATOR
Crystal Frequency (Note 5)
fXTAL
fRF = 433MHz
fRF = 315MHz
VXTALSEL = 0V
VXTALSEL = VDD
VXTALSEL = 0V
VXTALSEL = VDD
6.6128
13.2256
4.7547
9.5094
MHz
MHz
Crystal Tolerance
50 ppm
Input Impedance
From each pin to ground
6.2 pF
Note 1: 100% tested at TA = +25°C. Guaranteed by design and characterization over temperature.
Note 2: IRSEL is internally set to 375MHz IR mode. It can be left open when the 375MHz image rejection setting is desired. A 1nF
capacitor is recommended in noisy environments.
Note 3: BER = 2 x 10-3, Manchester encoded, data rate = 4kbps, IF bandwidth = 280kHz.
Note 4: Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration con-
nected from the LNA source to ground. The equivalent input circuit is 50in series with 2.2pF.
Note 5: Crystal oscillator frequency for other RF carrier frequency within the 300MHz to 450MHz range is (fRF - 10.7MHz)/64 for
XTALSEL = 0V, and (fRF - 10.7MHz)/32 for XTALSEL = VDD.
_______________________________________________________________________________________ 5

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MAX1473 arduino
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315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Additional pulling can be calculated if the electrical
parameters of the crystal are known. The frequency
pulling is given by:
fp
=
Cm
2
 Ccase
1
+
Cload
-
Ccase
1
+
Cspec

× 106
where:
fp is the amount the crystal frequency pulled in ppm.
Cm is the motional capacitance of the crystal.
Ccase is the case capacitance.
Cspec is the specified load capacitance.
Cload is the actual load capacitance.
When the crystal is loaded as specified, i.e., Cload =
Cspec, the frequency pulling equals zero.
Data Filter
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the com-
bination of two on-chip resistors and two external
capacitors. Adjusting the value of the external capaci-
tors changes the corner frequency to optimize for dif-
ferent data rates. The corner frequency should be set
to approximately 1.5 times the fastest expected data
rate from the transmitter. Keeping the corner frequency
near the data rate rejects any noise at higher frequen-
cies, resulting in an increase in receiver sensitivity.
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a rolloff rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C5 and C6, use the following equations along
with the coefficients in Table 2:
( )( )( )C5 =
b
a 100k π fc
( )( )( )C6 =
a
4 100k π fc
where fC is the desired 3dB corner frequency.
For example, choose a Butterworth filter response with
a corner frequency of 5kHz:
( )( )( )( )C5 =
1.000
450pF
1.414 100k3.14 5kHz
MAX1473
RSSI
RDF2
100k
RDF1
100k
19 21 22
DFO OPP DFFB
C6 C5
Figure 1. Sallen-Key Lowpass Data Filter
Choosing standard capacitor values changes C5 to
470pF and C6 to 220pF, as shown in the Typical
Application Circuit.
Table 2. Coefficents to Calculate C5 and C6
FILTER TYPE
Butterworth (Q = 0.707)
Bessel (Q = 0.577)
a
1.414
1.3617
b
1.000
0.618
Data Slicer
The purpose of the data slicer is to take the analog out-
put of the data filter and convert it to a digital signal.
This is achieved by using a comparator and comparing
the analog input to a threshold voltage. One input is
supplied by the data filter output. Both comparator
inputs are accessible off chip to allow for different
methods of generating the slicing threshold, which is
applied to the second comparator input.
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capaci-
tor (C4) from DSN to DGND (Figure 2). This configura-
tion averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The sizes of R1 and C4
affect how fast the threshold tracks to the analog ampli-
tude. Be sure to keep the corner frequency of the RC
circuit much lower than the lowest expected data rate.
Note that a long string of zeros or 1s can cause the
threshold to drift. This configuration works best if a cod-
______________________________________________________________________________________ 11

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