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PDF NTB18N06L Data sheet ( Hoja de datos )
| Número de pieza | NTB18N06L | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTP18N06L, NTB18N06L
Power MOSFET
15 Amps, 60 Volts,
Logic Level
N−Channel TO−220 and D2PAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
Typical Applications
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 10 mW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tp v 10 ms)
Drain Current
− Continuous @ TC = 25°C
− Continuous @ TC = 100°C
− Single Pulse (tp v 10 ms)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
VDSS
VDGR
VGS
60
60
"10
"20
Vdc
Vdc
Vdc
ID 15 Adc
ID 8.0 Adc
IDM 45 Apk
PD 48.4 Watts
0.32 W/°C
Operating and Storage Temperature Range
TJ, Tstg − 55 to °C
+175
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, VDS = 60 Vdc,
IL(pk) = 11 A, L = 1.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
EAS
RqJC
RqJA
TL
61 mJ
°C/W
3.1
72.5
260 °C
© Semiconductor Components Industries, LLC, 2003
October, 2003 − Rev. 3
1
http://onsemi.com
15 AMPERES
60 VOLTS
RDS(on) = 100 mW
N−Channel
D
G
S
1
2
3
4
TO−220AB
CASE 221A
STYLE 5
4
12
3
D2PAK
CASE 418AA
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
NTx18N06L
LLYWW
NTx18N06L
LLYWW
1
Gate
3
Source
12 3
Gate Drain Source
2
Drain
NTx18N06L = Device Code
x = B or P
LL = Location Code
Y = Year
WW = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Publication Order Number:
NTP18N06L/D
1 page  
NTP18N06L, NTB18N06L
6
Q1
4
QT
Q2
1000
VDS = 30 V
ID = 15 A
VGS = 5 V
100 tr
VGS
2
ID = 15 A
TJ = 25°C
0
02 4 6 8
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
tf
td(off)
10
td(on)
1
1 10
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
16
VGS = 0 V
12
100
8
4 TJ = 150°C
TJ = 25°C
0
0.3 0.4 0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance −
General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous ID can safely be assumed to
equal the values indicated.
http://onsemi.com
5
5 Page 
NTP18N06L, NTB18N06L
PACKAGE DIMENSIONS
Q
H
Z
B
4
1 23
F
T
TO−220
CASE 221A−09
ISSUE AA
−T−
SEATING
PLANE
C
S
A
U
K
L
V
G
N
D
R
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
INCHES
DIM MIN MAX
A 0.570 0.620
B 0.380 0.405
C 0.160 0.190
D 0.025 0.035
F 0.142 0.147
G 0.095 0.105
H 0.110 0.155
J 0.018 0.025
K 0.500 0.562
L 0.045 0.060
N 0.190 0.210
Q 0.100 0.120
R 0.080 0.110
S 0.045 0.055
T 0.235 0.255
U 0.000 0.050
V 0.045 −−−
Z −−− 0.080
MILLIMETERS
MIN MAX
14.48 15.75
9.66 10.28
4.07 4.82
0.64 0.88
3.61 3.73
2.42 2.66
2.80 3.93
0.46 0.64
12.70 14.27
1.15 1.52
4.83 5.33
2.54 3.04
2.04 2.79
1.15 1.39
5.97 6.47
0.00 1.27
1.15 −−−
−−− 2.04
STYLE 5:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NTB18N06L.PDF ] | |
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