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PDF S93A66A Data sheet ( Hoja de datos )
| Número de pieza | S93A66A | |
| Descripción | (S93Ax6A) CMOS SERIAL E2PROM | |
| Fabricantes | Seiko Instruments | |
| Logotipo |  |
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Rev.2.1_00
CMOS SERIAL E2PROM
S-93A46A/56A/66A
The S-93A46A/56A/66A is a high-temperature
operation, high speed, low current consumption, 1 K-
bit, 2 K-bit and 4 K-bit serial E2PROM with a wide
operating voltage range. It is organized as 64-word ×
16-bit, 128-word × 16-bit and 256-word × 16-bit in
each. It is capable of sequential read, at which time
addresses are automatically incremented in 16-bit
blocks. The instruction code is compatible with the
NM93CS46/56/66.
Features
• Low current consumption
Standby: 3.0 µA Max. (VCC = 5.5 V)
Operating: 1.0 mA Max. (VCC = 5.5 V)
0.6 mA Max. (VCC = 2.7 V)
• Wide operating voltage range Read: 2.7 to 5.5 V
Write: 2.7 to 5.5 V
• Sequential read capable
• Write disable function when power supply voltage is low
• Function to protect against write due to erroneous instruction recognition
• CMOS schmitt input (CS, SK)
• Endurance:
106 cycles/word* (at +85°C)
1.5 × 105 cycles/word* (at +125°C)
* For each address (Word: 16 bits)
• Data retention:
15 years (after rewriting 1.5 × 105 cycles/word at +125°C)
• High-temperature operation: +125°C Max.
• Lead-free products
Packages
Package name
8-Pin SOP (JEDEC)
Package
FJ008-A
Drawing code
Tape
FJ008-D
Reel
FJ008-D
Caution Before using the product in medical equipment or automobile equipment including car audios,
keyless entries and engine control units, contact to SII is indispensable.
Seiko Instruments Inc.
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Rev.2.1_00
CMOS SERIAL E2PROM
S-93A46A/56A/66A
Absolute Maximum Ratings
Table 5
Item
Symbol
Ratings
Unit
Power supply voltage
Input voltage
Output voltage
VCC
VIN
VOUT
−0.3 to +7.0
−0.3 to VCC +0.3
−0.3 to VCC
V
V
V
Operating ambient temperature
Topr
−40 to +125
°C
Storage temperature
Tstg
−65 to +150
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
Recommended Operating Conditions
Table 6
Item
Power supply voltage
High level input voltage
Low level input voltage
Symbol
VCC
VIH
VIL
Condition
Min.
READ/EWDS
2.7
WRITE/ERASE/
WRAL/ERAL/EWEN
2.7
0.8 × VCC
0.0
Typ.
Max.
5.5
5.5
VCC
0.2 × VCC
Unit
V
V
V
V
Pin Capacitance
Item
Input Capacitance
Output Capacitance
Table 7
Symbol
CIN
COUT
Condition
VIN = 0 V
VOUT = 0 V
(Ta = 25°C, f = 1.0 MHz, VCC = 5.0 V)
Min. Typ. Max. Unit
8 pF
10 pF
Seiko Instruments Inc.
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Rev.2.1_00
CMOS SERIAL E2PROM
S-93A46A/56A/66A
4. Writing (WRITE, ERASE, WRAL, ERAL)
A write operation includes four write instructions: data write (WRITE), data erase (ERASE), chip write
(WRAL), and chip erase (ERAL).
A write instruction (WRITE, ERASE, WRAL, ERAL) starts a write operation to the memory cell when a
low level is input to CS after a specified number of clocks have been input. The SK and DI inputs are
invalid during the write period, so do not input an instruction.
Input an instruction while the output status of the DO pin is high or high impedance (Hi-Z).
A write operation is valid only in program enable mode (refer to “5. Write Enable (EWEN) and Write
Disable (EWDS)”).
4.1 Verify Operation
A write operation executed by any instruction is completed within 8 ms (write time tPR: typically 4 ms),
so if the completion of the write operation is recognized, the write cycle can be minimized. A
sequential operation to confirm the status of a write operation is called a verify operation.
(1) Operation
After the write operation has started (CS = low), the status of the write operation can be verified by
confirming the output status of the DO pin by inputting a high level to CS again. This sequence is
called a verify operation, and the period that a high level is input to the CS pin after the write
operation has started is called the verify operation period.
The relationship between the output status of the DO pin and the write operation during the verify
operation period is as follows.
• DO pin = low: Writing in progress (busy)
• DO pin = high:Writing completed (ready)
(2) Operation Example
There are two methods to perform a verify operation: Waiting for a change in the output status of
the DO pin while keeping CS high, or suspending the verify operation (CS = low) once and then
performing it again to verify the output status of the DO pin. The latter method allows the CPU to
perform other processing during the wait period, allowing an efficient system to be designed.
Caution 1. Input a low level to the DI pin during a verify operation.
2. If a high level is input to the DI pin at the rise of SK when the output status of the
DO pin is high, the S-93A66A latches the instruction assuming that a start bit has
been input. In this case, note that the DO pin immediately enters a high-impedance
(Hi-Z) state.
Seiko Instruments Inc.
11
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