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PDF NL10276BC30-10 Data sheet ( Hoja de datos )
| Número de pieza | NL10276BC30-10 | |
| Descripción | TFT COLOR LCD MODULE | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL10276BC30-10
38cm (15.0 Type)
XGA
LVDS Interface (1port)
PRELIMINARY DATA SHEET
(3rd edition)
All information is subject to change without notice.
Please confirm the delivery specification before starting
to design your system.
Document Number: DOD-M-1260 (3rd edition)
Published date: December 2002 N CP(N)
1
ã NEC Corporation
2002 All rights reserved.
1 page  
NL10276BC30-10
2. GENERAL SPECIFICATIONS
Display area
304.128 (W) × 228.096 (H) mm (typ.)
Diagonal size of display
38.0 cm (15.0 inches)
Drive system
a-Si TFT active matrix
Display color
16,777,216 colors (6bit+FRC)
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
1,024 (H) × 768 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.099 (W) × 0.297 (H) mm
0.297 (W) × 0.297 (H) mm
328.0 (W) × 252.0 (H) × 11.0 (D) mm (typ.)
970 g (typ.)
Contrast ratio
450:1 (typ.)
Viewing angle
Designed viewing direction
At the contrast ratio 10:1
• Horizontal: Right side 60° (typ.), Left side 60° (typ.)
• Vertical: Up side 40° (typ.), Down side 60° (typ.)
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: normal axis
• Viewing angle with optimum grayscale (γ=2.2): normal axis
Polarizer surface
Polarizer pencil-hardness
Color gamut
Antiglare
3H (min.) [by JIS K5400]
At LCD panel center
60 % (typ.) [against NTSC color space]
Response time
Luminance
Ton (white 90%→ black 10%)
8 ms (typ.)
At IBL=7.5mArms / lamp
250 cd/m2 (typ.)
Signal system
LVDS 1port (Receiver: THC63LVDF84A, THine Electronics Inc.)
[8-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE)]
Power supply voltage
Backlight
LCD panel signal processing board: 3.3V
Edge light type: 2 cold cathode fluorescent lamps
Replaceable part
• Lamp holder set: Type No. TBD
3
3
3
3
3
Power consumption
At IBL=7.5mArms / lamp and checkered flag pattern
9.4W (typ.)
3
PRELIMINARY DATA SHEET DOD-M-1260 (3rd edition)
5
5 Page 
NL10276BC30-10
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 Sequence for LCD panel signal processing board
VCC 0V
Note1
ON
3.0V
A
F
OFF
2.5V 3.0V
B
C
Display signals*
Function signal*
Note2
0V
D
VALID period
E
* These signals should be measured at the terminal of 100Ω resistor.
Parameter
Symbol Min. Typ. Max. Unit
A - - 10 ms
B 0.01 - 10 ms
Input voltage sequence
C
500 -
- ms
D 0.01 - 50 ms
E 0.01 - 50 ms
VCC dip condition
F
- - 20 ms
Remarks
-
-
-
-
-
Note3
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a
protection circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/- and CK+/-) and function signal (MSL) must be "0"
voltage, exclude the VALID period (See above sequence diagram). If these signals are
higher than 0.3V, the internal circuit is damaged.
If some of display and function signals of this product are cut while this product is
working, even if the signal input to it once again, it might not work normally. If customer
stops the display and function signals, they should be cut VCC.
Note3: VCC should be 2.5V or more while VCC ON period.
Note4: The backlight power supply voltage should be inputted within the valid period of display
and function signals, in order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-M-1260 (3rd edition)
11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet NL10276BC30-10.PDF ] | |
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