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Número de pieza | NL8060BC26-27 | |
Descripción | TFT COLOR LCD MODULE | |
Fabricantes | NEC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NL8060BC26-27 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
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TFT COLOR LCD MODULE
NL8060BC26-27
26.0cm (10.4 Type)
SVGA
PRELIMINARY DATA SHEET
DOD-PD-0685 (2nd edition)
This PRELIMINARY DATA SHEET is updated
document from DOD-PD-0652(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-0685 (2nd edition)
Published date: October 2004 CP(N)
1 © NEC LCD Technologies, Ltd.
2004 All rights reserved.
1 page NL8060BC26-27
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
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Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
211.2 (H) × 158.4 (V) mm
26.0 cm (10.4 inches)
a-Si TFT active matrix
262,144 colors
800 (H) × 600 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.088 (H) × 0.264 (V) mm
0.264 (H) × 0.264 (V) mm
243.0 (W) × 185.1 (H) × 10.5 (D) mm (typ.)
TBD g (typ.)
(500):1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 85° (typ.), Left side 85° (typ.)
• Vertical: Up side 85° (typ.), Down side 85° (typ.)
At DPS= High: Normal scan
• Viewing angle with optimum grayscale (γ=2.2): normal axis
Clear
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
(50) ms (typ.)
At IBL= 5.0mArms / lamp
400 cd/m2 (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
Edge light type: 2 cold cathode fluorescent lamps
Replaceable part
• Lamp holder set: Type No. TBD
Recommended inverter (Option)
• Inverter: Type No. TBD
At IBL=5.0mArms / lamp and checkered flag pattern
TBD W (typ., Power dissipation of the inverter is not included.)
PRELIMINARY DATA SHEET DOD-PD-0685 (2nd edition)
5
5 Page NL8060BC26-27
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
10µs≤Tr < 50ms
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Display signals
Function signals
Note2
0V
0ms < t < 35ms
VALID period
OFF
0.3V
Toff ≥ 50ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC
= 3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product
may not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, R0 to R5, G0 to G5, B0 to B5) and function
signal (DPS) must be Low or High-impedance, exclude the VALID period (See above
sequence diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is
working, even if the signal input to it once again, it might not work normally. If customer
stops the display and function signals, they should be cut VCC.
4.4.2 Inverter (Option)
Display signals
Function signals
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The inverter power supply voltage (VDDB) should be inputted within the valid period of
display and function signals, in order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PD-0685 (2nd edition)
11
11 Page |
Páginas | Total 29 Páginas | |
PDF Descargar | [ Datasheet NL8060BC26-27.PDF ] |
Número de pieza | Descripción | Fabricantes |
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