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PDF PI74ALVCH16373 Data sheet ( Hoja de datos )
| Número de pieza | PI74ALVCH16373 | |
| Descripción | 16-Bit Transparent D-Type Latch | |
| Fabricantes | Pericom Semiconductor Corporation | |
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16-Bit Transparent D-Type Latch
with 3-STATE Outputs
Product Features
• PI74ALVCH16373 is designed for low voltage operation
• VCC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical VOLP (Output Ground Bounce)
www.DataShe<et04U.8.cVomat VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
• Industrial operation at –40°C to +85°C
• Packages available:
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
1OE 1
1LE 48
47
1D1
C1
1D
2 1Q1
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
This 16-bit transparent D-type latch is designed for 2.3V to 3.6V
VCC operation.
The PI74ALVCH16373 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as two 8-bit latches or one 16-bit
latch. When the Latch Enable (LE) input is HIGH, the Q outputs
follow the (D) inputs. When LE is taken LOW, the Q outputs are
latched at the levels set up at the D inputs.
A buffered Output Enable (OE) input can be used to place the
eight outputs in either a normal logic state (high or low logic
levels) or a high-impedance state in which the outputs neither
load nor drive the bus lines significantly. The high-impedance state
and the increased drive provide the capability to drive bus lines
without need for interface or pullup components. OE does not
affect internal operations of the latch. Old data can be retained
or new data can be entered while the outputs are in the high
impedance state.
To ensure the high impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
24
2OE
2LE 25
36
2D1
To Seven Other Channels
C1
1D
13 2Q1
To Seven Other Channels
1
PS8093B 10/09/00
1 page  
PI74ALVCH16373
16-Bit Transparent D-Type Latch
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Switching Characteristics over Operating Range(1)
Parameters
From (INPUT)
VCC = 2.5V ±0.2V
To (OUTPUT)
Min.(2) Max.
tPD D
1.0 4.5
tPD LE
tEN OE
1.0 5.9
Q
1.0 6.0
www.DataSheet4UtD.cIoSm
Notes:
OE
1.9
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5.1
VCC = 2.7V VCC = 3.3V ±0.3V
Units
Min. Max. Min.(2) Max.
4.3 1.1 3.6
4.6 1.0 3.9
ns
5.7 1.0 4.7
4.5 1.4 4.1
Operating Characteristics, TA = 25ºC
Parameter
CPD Power Dissipation
Capacitance
Outputs Enabled
Outputs Disabled
Test Conditions
CL = 50pF, f = 10 MHz
VCC = 2.5V ±0.2V VCC = 3.3V ±0.3V
Typ.
19 22
45
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5 PS8093B 10/09/00
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet PI74ALVCH16373.PDF ] | |
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