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PDF W5NK100Z Data sheet ( Hoja de datos )

Número de pieza W5NK100Z
Descripción STW5NK100Z
Fabricantes STMicroelectronics 
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No Preview Available ! W5NK100Z Hoja de datos, Descripción, Manual

STP5NK100Z - STF5NK100Z
STW5NK100Z
N-channel 1000V - 2.7- 3.5A - TO-220/TO-220FP/TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
www.DataSheet4U.com Type
STF5NK100Z
STP5NK100Z
STW5NK100Z
VDSS
(@Tjmax)
1000 V
1000 V
1000 V
RDS(on)
< 3.7
< 3.7
< 3.7
ID
3.5 A
3.5 A
3.5 A
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatibility
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
stripbased PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
Switching application
TO-220
3
2
1
TO-220FP
TO-247
Internal schematic diagram
Order codes
Part number
STF5NK100Z
STP5NK100Z
STW5NK100Z
Marking
F5NK100Z
P5NK100Z
W5NK100Z
Package
TO-220FP
TO-220
TO-247
Packaging
Tube
Tube
Tube
August 2006
Rev 4
1/16
www.st.com
16

1 page




W5NK100Z pdf
STP5NK100Z - STF5NK100Z - STW5NK100Z
2 Electrical characteristics
Electrical characteristics
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(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
ID = 1mA, VGS= 0
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating,
Tc = 125°C
IGSS
VGS(th)
RDS(on)
Gate body leakage current
(VGS = 0)
VGS = ± 20V
Gate threshold voltage
VDS = VGS, ID = 100µA
Static drain-source on
resistance
VGS = 10V, ID = 1.75 A
Min. Typ. Max. Unit
1000
V
1 µA
50 µA
±10 µA
3 3.75 4.5 V
2.7 3.7
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Ciss
Coss
Crss
Forward transconductance VDS =15V, ID = 1.75A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25V, f=1 MHz, VGS=0
4
1154
106
21.3
S
pF
pF
pF
Cosseq(2).
Equivalent output
capacitance
VGS=0, VDS =0V to 800V
46.8
pF
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Off-voltage rise time
Fall time
VDD=500 V, ID= 1.75 A,
RG=4.7Ω, VGS=10V
(see Figure 20)
22.5 ns
7.7 ns
51.5 ns
19 ns
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD=800V, ID = 3.5 A
VGS =10V
(see Figure 21)
42
7.3 59
21.7
nC
nC
nC
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
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5 Page





W5NK100Z arduino
STP5NK100Z - STF5NK100Z - STW5NK100Z
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
www.DataSheet4U.com
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