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C8051F061 PDF даташит

Спецификация C8051F061 изготовлена ​​​​«Silicon Laboratories» и имеет функцию, называемую «(C8051F060 - C8051F067) Mixed Signal ISP Flash MCU Family».

Детали детали

Номер произв C8051F061
Описание (C8051F060 - C8051F067) Mixed Signal ISP Flash MCU Family
Производители Silicon Laboratories
логотип Silicon Laboratories логотип 

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C8051F061 Даташит, Описание, Даташиты
C8051F060/1/2/3/4/5/6/7
Mixed Signal ISP Flash MCU Family
Analog Peripherals
- Two 16-Bit SAR ADCs
16-bit resolution
±0.75 LSB INL, guaranteed no missing codes
Programmable throughput up to 1 Msps
Operate as two single-ended or one differential con-
verter
Direct memory access; data stored in RAM without
software overhead
Data-dependent windowed interrupt generator
- 10-bit SAR ADC (C8051F060/1/2/3)
Programmable throughput up to 200 ksps
www.DataSheet4U.com 8 external inputs, single-ended or differential
Built-in temperature sensor
- Two 12-bit DACs (C8051F060/1/2/3)
Can synchronize outputs to timers for jitter-free wave-
form generation
- Three Analog Comparators
Programmable hysteresis/response time
- Voltage Reference
- Precision VDD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-circuit/in-system debugging
- Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- IEEE1149.1 compliant boundary scan
- Complete development kit
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instruction set in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Flexible Interrupt sources
Memory
- 4352 Bytes internal data RAM (4 k + 256)
- 64 kB (C8051F060/1/2/3/4/5), 32 kB (C8051F066/7)
Flash; In-system programmable in 512-byte sectors
- External 64 kB data memory interface with multi-
plexed and non-multiplexed modes (C8051F060/2/
4/6)
Digital Peripherals
- 59 general purpose I/O pins (C8051F060/2/4/6)
- 24 general purpose I/O pins (C8051F061/3/5/7)
- Bosch Controller Area Network (CAN 2.0B -
C8051F060/1/2/3)
- Hardware SMBus™ (I2C™ Compatible), SPI™, and
two UART serial ports available concurrently
- Programmable 16-bit counter/timer array with
6 capture/compare modules
- 5 general purpose 16-bit counter/timers
- Dedicated watchdog timer; bi-directional reset pin
Clock Sources
- Internal calibrated precision oscillator: 24.5 MHz
- External oscillator: Crystal, RC, C, or clock
Supply Voltage .......................... 2.7 to 3.6 V
- Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
Temperature Range: -40 to +85 °C
ANALOGPERIPHERALS
16-bit
1 Msps
ADC
16-bit
1 Msps
ADC
DMA
Interface
VREF
+ ++
- --
VOLTAGE
COMPARATOR
S
10-bit
200ksps
ADC
TEMP
SENSOR
C8051F060/1/2/3Only
12-Bit
DAC
12-Bit
DAC
DIGITAL I/O
CAN 2.0B
C8051F060/1/2/3
Port 0
Port 1
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
100 pin Only
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
22
INTERRUPTS
64/32 kB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
SRAM
JTAG
CLOCK
SANITY
CIRCUIT CONTROL
Preliminary Rev. 1.2 7/04
Copyright © 2004 by Silicon Laboratories
C8051F060/1/2/3/4/5/6/7
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.









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C8051F061 Даташит, Описание, Даташиты
C8051F060/1/2/3/4/5/6/7
www.DataSheet4U.com
2 Rev. 1.2









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C8051F061 Даташит, Описание, Даташиты
C8051F060/1/2/3/4/5/6/7
Table of Contents
1. System Overview.................................................................................................... 19
1.1. CIP-51™ Microcontroller Core.......................................................................... 25
1.1.1. Fully 8051 Compatible.............................................................................. 25
1.1.2. Improved Throughput ............................................................................... 25
1.1.3. Additional Features .................................................................................. 26
1.2. On-Chip Memory............................................................................................... 27
1.3. JTAG Debug and Boundary Scan..................................................................... 28
www.DataSheet4U.com 1.4. Programmable Digital I/O and Crossbar ........................................................... 29
1.5. Programmable Counter Array ........................................................................... 30
1.6. Controller Area Network.................................................................................... 31
1.7. Serial Ports ....................................................................................................... 32
1.8. 16-Bit Analog to Digital Converters................................................................... 33
1.9. 10-Bit Analog to Digital Converter..................................................................... 34
1.10.12-bit Digital to Analog Converters................................................................... 35
1.11.Analog Comparators......................................................................................... 36
2. Absolute Maximum Ratings .................................................................................. 37
3. Global DC Electrical Characteristics .................................................................... 38
4. Pinout and Package Definitions............................................................................ 39
5. 16-Bit ADCs (ADC0 and ADC1) ............................................................................. 51
5.1. Single-Ended or Differential Operation ............................................................. 52
5.1.1. Pseudo-Differential Inputs ........................................................................ 52
5.2. Voltage Reference ............................................................................................ 53
5.3. ADC Modes of Operation.................................................................................. 54
5.3.1. Starting a Conversion............................................................................... 54
5.3.2. Tracking Modes........................................................................................ 54
5.3.3. Settling Time Requirements ..................................................................... 56
5.4. Calibration......................................................................................................... 66
5.5. ADC0 Programmable Window Detector ........................................................... 69
6. Direct Memory Access Interface (DMA0) ............................................................. 75
6.1. Writing to the Instruction Buffer......................................................................... 75
6.2. DMA0 Instruction Format .................................................................................. 76
6.3. XRAM Addressing and Setup ........................................................................... 76
6.4. Instruction Execution in Mode 0........................................................................ 77
6.5. Instruction Execution in Mode 1........................................................................ 78
6.6. Interrupt Sources .............................................................................................. 79
6.7. Data Buffer Overflow Warnings and Errors....................................................... 79
7. 10-Bit ADC (ADC2, C8051F060/1/2/3).................................................................... 87
7.1. Analog Multiplexer ............................................................................................ 88
7.2. Modes of Operation .......................................................................................... 89
7.2.1. Starting a Conversion............................................................................... 89
7.2.2. Tracking Modes........................................................................................ 90
7.2.3. Settling Time Requirements ..................................................................... 91
Rev. 1.2
3










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Номер в каталогеОписаниеПроизводители
C8051F060(C8051F060 - C8051F067) Mixed Signal ISP Flash MCU FamilySilicon Laboratories
Silicon Laboratories
C8051F061(C8051F060 - C8051F067) Mixed Signal ISP Flash MCU FamilySilicon Laboratories
Silicon Laboratories
C8051F062(C8051F060 - C8051F067) Mixed Signal ISP Flash MCU FamilySilicon Laboratories
Silicon Laboratories
C8051F063(C8051F060 - C8051F067) Mixed Signal ISP Flash MCU FamilySilicon Laboratories
Silicon Laboratories

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