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C8051F040 PDF даташит

Спецификация C8051F040 изготовлена ​​​​«Silicon Laboratories» и имеет функцию, называемую «(C8051F040 - C8051F047) 100-Pin Mixed-Signal MCU».

Детали детали

Номер произв C8051F040
Описание (C8051F040 - C8051F047) 100-Pin Mixed-Signal MCU
Производители Silicon Laboratories
логотип Silicon Laboratories логотип 

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C8051F040 Даташит, Описание, Даташиты
C8051F040/1/2/3/4/5/6/7
Mixed Signal ISP Flash MCU Family
Analog Peripherals
- 10 or 12-Bit SAR ADC
12-bit (C8051F040/1) or
10-bit (C8051F042/3/4/5/6/7) resolution
± 1 LSB INL, guaranteed no missing codes
Programmable throughput up to 100 ksps
13 External Inputs; single-ended or differential
SW programmable high voltage difference amplifier
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor
- 8-bit SAR ADC (C8051F040/1/2/3 only)
Programmable throughput up to 500 ksps
8 External Inputs, single-ended or differential
www.DataSheet4U.com Programmable amplifier gain: 4, 2, 1, 0.5
- Two 12-bit DACs (C8051F040/1/2/3 only)
Can synchronize outputs to timers for jitter-free wave-
form generation
- Three Analog Comparators
Programmable hysteresis/response time
- Voltage Reference
- Precision VDD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
- On-chip debug circuitry facilitates full- speed, non-
intrusive in-circuit/in-system debugging
- Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- IEEE1149.1 compliant boundary scan
- Complete development kit
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instruction set in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- 20 vectored interrupt sources
Memory
- 4352 bytes internal data RAM (4 k + 256)
- 64 kB (C8051F040/1/2/3/4/5)
or 32 kB (C8051F046/7) Flash; in-system program-
mable in 512-byte sectors
- External 64 kB data memory interface (programma-
ble multiplexed or non-multiplexed modes)
Digital Peripherals
- 8 byte-wide port I/O (C8051F040/2/4/6); 5 V tolerant
- 4 byte-wide port I/O (C8051F041/3/5/7); 5 V tolerant
- Bosch Controller Area Network (CAN 2.0B), hard-
ware SMBus™ (I2C™ Compatible), SPI™, and
two UART serial ports available concurrently
- Programmable 16-bit counter/timer array with
6 capture/compare modules
- 5 general purpose 16-bit counter/timers
- Dedicated watch-dog timer; bi-directional reset pin
Clock Sources
- Internal calibrated programmable oscillator: 3 to
24.5 MHz
- External oscillator: crystal, RC, C, or clock
- Real-time clock mode using Timer 2, 3, 4, or PCA
Supply Voltage: 2.7 to 3.6 V
- Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
- Temperature Range: –40 to +85 °C
ANALOG PERIPHERALS
TEMP
SENSOR
PGA
VREF
12/10-bit
100 ksps
ADC
8-bit
PGA 500 ksps
ADC
HV
DIFF
AMP
12-Bit
DAC
12-Bit
DAC
C8051F041/2/3
ONLY
+ ++
- --
VOLTAGE COMPARATORS
DIGITAL I/O
CAN
2.0B
UART0
Port 0
Port 1
UART1
SMBus
SPI Bus
Port 2
Port 3
PCA
Timer 0
Port 4
Timer 1
Timer 2
Timer 3
Timer 4
Port 5
Port 6
Port 7
64 pin 100 pin
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25 MIPS)
20
INTERRUPTS
64 kB/32 kB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
SRAM
JTAG
CLOCK
SANITY
CIRCUIT CONTROL
Rev. 1.4 11/04
Copyright © 2004 by Silicon Laboratories
C8051F04x









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C8051F040 Даташит, Описание, Даташиты
C8051F040/1/2/3/4/5/6/7
NOTES:
www.DataSheet4U.com
2 Rev. 1.4









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C8051F040 Даташит, Описание, Даташиты
C8051F040/1/2/3/4/5/6/7
Table of Contents
1. System Overview.................................................................................................... 19
1.1. CIP-51™ Microcontroller Core.......................................................................... 25
1.1.1. Fully 8051 Compatible.............................................................................. 25
1.1.2. Improved Throughput ............................................................................... 25
1.1.3. Additional Features .................................................................................. 26
1.2. On-Chip Memory............................................................................................... 27
1.3. JTAG Debug and Boundary Scan..................................................................... 28
1.4. Programmable Digital I/O and Crossbar ........................................................... 29
www.DataSheet4U.com 1.5. Programmable Counter Array ........................................................................... 30
1.6. Controller Area Network.................................................................................... 31
1.7. Serial Ports ....................................................................................................... 31
1.8. 12/10-Bit Analog to Digital Converter................................................................ 32
1.9. 8-Bit Analog to Digital Converter (C8051F040/1/2/3 Only) ............................... 33
1.10.Comparators and DACs ................................................................................... 34
2. Absolute Maximum Ratings .................................................................................. 35
3. Global DC Electrical Characteristic ...................................................................... 36
4. Pinout and Package Definitions............................................................................ 37
5. 12-Bit ADC (ADC0, C8051F040/1 Only)................................................................. 47
5.1. Analog Multiplexer and PGA............................................................................. 47
5.1.1. Analog Input Configuration....................................................................... 48
5.2. High Voltage Difference Amplifier ..................................................................... 52
5.3. ADC Modes of Operation.................................................................................. 54
5.3.1. Starting a Conversion............................................................................... 54
5.3.2. Tracking Modes........................................................................................ 54
5.3.3. Settling Time Requirements ..................................................................... 56
5.4. ADC0 Programmable Window Detector ........................................................... 62
6. 10-Bit ADC (ADC0, C8051F042/3/4/5/6/7 Only)..................................................... 69
6.1. Analog Multiplexer and PGA............................................................................. 69
6.1.1. Analog Input Configuration....................................................................... 70
6.2. High Voltage Difference Amplifier ..................................................................... 74
6.3. ADC Modes of Operation.................................................................................. 76
6.3.1. Starting a Conversion............................................................................... 76
6.3.2. Tracking Modes........................................................................................ 76
6.3.3. Settling Time Requirements ..................................................................... 78
6.4. ADC0 Programmable Window Detector ........................................................... 84
7. 8-Bit ADC (ADC2, C8051F040/1/2/3 Only)............................................................. 91
7.1. Analog Multiplexer and PGA............................................................................. 91
7.2. ADC2 Modes of Operation................................................................................ 92
7.2.1. Starting a Conversion............................................................................... 92
7.2.2. Tracking Modes........................................................................................ 92
7.2.3. Settling Time Requirements ..................................................................... 94
7.3. ADC2 Programmable Window Detector ......................................................... 100
7.3.1. Window Detector In Single-Ended Mode ............................................... 100
Rev. 1.4
3










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