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PDF HD6433926 Data sheet ( Hoja de datos )
| Número de pieza | HD6433926 | |
| Descripción | Single-chip microcomputer | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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H8/3927 Series
H8/3927, H8/3926, H8/3925, H8/3924
Hardware Manual
1 page  
5.4.1 Transition to Watch Mode .................................................................................. 101
5.4.2 Clearing Watch Mode......................................................................................... 101
5.4.3 Oscillator Settling Time after Watch Mode is Cleared ...................................... 101
5.5 Subsleep Mode................................................................................................................ 102
5.5.1 Transition to Subsleep Mode .............................................................................. 102
5.5.2 Clearing Subsleep Mode..................................................................................... 102
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5.6 Subactive Mode .............................................................................................................. 103
5.6.1 Transition to Subactive Mode............................................................................. 103
5.6.2 Clearing Subactive Mode ................................................................................... 103
5.6.3 Operating Frequency in Subactive Mode ........................................................... 103
5.7 Active (Medium-Speed) Mode ....................................................................................... 104
5.7.1 Transition to Active (Medium-Speed) Mode ..................................................... 104
5.7.2 Clearing Active (Medium-Speed) Mode ............................................................ 104
5.7.3 Operating Frequency in Active (Medium-Speed) Mode .................................... 104
5.8 Direct Transfer................................................................................................................ 105
Section 6 ROM ................................................................................................................. 107
6.1 Overview......................................................................................................................... 107
6.1.1 Block Diagram.................................................................................................... 107
6.2 PROM Mode................................................................................................................... 108
6.2.1 Setting to PROM Mode ..................................................................................... 108
6.2.2 Socket Adapter Pin Arrangement and Memory Map ......................................... 108
6.3 Programming .................................................................................................................. 111
6.3.1 Writing and Verifying......................................................................................... 111
6.3.2 Programming Precautions................................................................................... 116
6.4 Reliability of Programmed Data..................................................................................... 117
Section 7 RAM ................................................................................................................. 119
7.1 Overview......................................................................................................................... 119
7.1.1 Block Diagram.................................................................................................... 119
Section 8 I/O Ports........................................................................................................... 121
8.1 Overview......................................................................................................................... 121
8.2 Port 1 ............................................................................................................................ 123
8.2.1 Overview............................................................................................................. 123
8.2.2 Register Configuration and Description ............................................................. 123
8.2.3 Pin Functions ...................................................................................................... 127
8.2.4 Pin States ............................................................................................................ 128
8.2.5 MOS Input Pull-Up............................................................................................. 128
8.3 Port 3 ............................................................................................................................ 129
8.3.1 Overview............................................................................................................. 129
8.3.2 Register Configuration and Description ............................................................. 129
8.3.3 Pin Functions ...................................................................................................... 134
5 Page 
Section 1 Overview
1.1 Overview
The H8/300L Series is a series of single-chip microcomputers (MCU: microcomputer unit), built
arouwnwdwt.hDeathaiSghhe-estp4eUe.dcoHm8/300L CPU and equipped with peripheral system functions on-chip.
Within the H8/300L Series, the H8/3927 Series of microcomputers are equipped with D/A
converters. Other on-chip peripheral functions include 10 timers, a 14-bit pulse width modulator
(PWM), two serial communication interface channels, an A/D converter, and a realtime output port.
Together, these functions make the H8/3927 Series ideally suited for embedded applications in
advanced control systems. The size of the on-chip ROM is 60 kbytes in the H8/3927, 48 kbytes in
the H8/3926, 40 kbytes in the H8/3925, and 32 kbytes in the H8/3924. Each model has 1 kbyte of
on-chip RAM. The ZTAT™* versions of the H8/3927 come with user-programmable PROM.
Table 1 summarizes the features of the H8/3927 Series.
Note: * ZTAT is a trademark of Hitachi, Ltd.
Table 1-1 Features
Item
CPU
Description
High-speed H8/300L CPU
• General-register architecture
General registers: Sixteen 8-bit registers (can be used as eight 16-bit
registers)
• Operating speed
— Max. operating speed: 5 MHz
— Add/subtract: 0.4 µs (operating at 5 MHz)
— Multiply/divide: 2.8 µs (operating at 5 MHz)
— Can run on 32.768 kHz subclock
• Instruction set compatible with H8/300 CPU
— Instruction length of 2 bytes or 4 bytes
— Basic arithmetic operations between registers
— MOV instruction for data transfer between memory and registers
Typical instructions
• Multiply (8 bits × 8 bits)
• Divide (16 bits ÷ 8 bits)
• Bit accumulator
• Register-indirect designation of bit position
1
11 Page | ||
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| PDF Descargar | [ Datasheet HD6433926.PDF ] | |
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