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SC102203 PDF даташит

Спецификация SC102203 изготовлена ​​​​«Freescale Semiconductor» и имеет функцию, называемую «nullDevice User Guide».

Детали детали

Номер произв SC102203
Описание nullDevice User Guide
Производители Freescale Semiconductor
логотип Freescale Semiconductor логотип 

30 Pages
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SC102203 Даташит, Описание, Даташиты
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MC9S12DT128
Device User Guide
Covers MC9S12DT128E, MC9S12DG128E,
MC9S12DJ128E, MC9S12DG128, MC9S12DJ128,
MC9S12DB128, MC9S12A128, SC515846, SC515847,
SC515848, SC515849, SC101161DT, SC101161DG,
SC101161DJ, SC102202, SC102203, SC102204,
SC102205
HCS12
Microcontrollers
9S12DT128DGV2/D
V02.15
05 OCT 2005
freescale.com









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SC102203 Даташит, Описание, Даташиты
Device User Guide — 9S12DT128DGV2/D V02.15
Revision History
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Version Revision Effective
Number Date
Date
V01.00
18 Jun 18 June
2001
2001
V01.01
23 July
2001
23 July
2001
V01.02
23 Sep
2001
23 Sep
2001
V01.03
12 Oct
2001
12 Oct
2001
V01.04
27 Feb
2002
27 Feb
2002
V01.05
4 Mar
2002
4 Mar
2002
V01.06
8 July
2002
22 July
2002
V02.00
11 Jan
2002
11 Jan
2002
V02.01
01 Feb
2002
01 Feb
2002
Author
Description of Changes
Initial version (parent doc v2.03 dug for dp256).
Updated version after review
Changed Partname, added pierce mode, updated electrical
characteristics
some minor corrections
Replaced Star12 by HCS12
Updated electrical spec after MC-Qualification (IOL/IOH), Data for
Pierce, NVM reliability
New document numbering. Corrected Typos
Increased VDD to 2.35V, removed min. oscillator startup
Removed Document order number except from Cover Sheet
Added:
Pull-up columns to signal table,
example for PLL Filter calculation,
Thermal values for junction to board and package,
BGND pin pull-up
Part Order Information
Global Register Table
Chip Configuration Summary
Modified:
Reduced Wait and Run IDD values
Mode of Operation chapter
changed leakage current for ADC inputs down to +-1uA
Corrected:
Interrupt vector table enable register inconsistencies
PCB layout for 80QFP VREGEN position
NEW MASKSET
Changed part number from DTB128 to DT128
Functional Changes:
ROMCTL changes in Emulation Mode
80 Pin Byteflight package Option available
Flash with 2 Bit Backdoor Key Enable
Additional CAN0 routing to PJ7,6
Improved BDM with sync and acknowledge capabilities
New Part ID number
Improvements:
Significantly improved NVM reliability data
Corrections:
Interrupt vector Table
Updated Block User Guide versions in preface
Updated Appendix A Electrical Characteristics
2 Freescale Semiconductor









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SC102203 Даташит, Описание, Даташиты
Device User Guide — 9S12DT128DGV2/D V02.15
wVwewrs.DioatnaShReeetv4Uis.cioomn Effective
Number Date
Date
V02.02
08 Mar
2002
08 Mar
2002
V02.03
14 Mar
2002
14 Mar
2002
V02.04
16 Aug
2002
16 Aug
2002
V02.05
12 Sep
2002
12 Sep
2002
V02.06
06 Nov
2002
06 Nov
2002
Author
Description of Changes
Changed XCLKS to PE7 in Table 2-2
Updated device part numbers in Figure 2-1
Updated BDM clock in Figure 3-1
Removed SIM description in overview & nUPOSC spec in Table A-15
Updated electrical spec of VDD & VDDPLL (Table A-4), IOL/IOH
(Table A-6), CINS (Table A-9), CIN (Table A-6 & A-15),
Updated interrupt pulse timing variables in Table A-6
Updated device part numbers in Figure 2-1
Added document numbers on cover page and Table 0-2
Cleaned up Fig. 1-1, 2-1
Updated Section 1.5 descriptions
Corrected PE assignment in Table 2-2, Fig. 2-5,6,7.
Corrected NVM sizes in Sections 16, 17
Added IREF spec for 1ATD in Table A-8
Added Blank Check in A.3.1.5 and Table A-11
Updated CRG spec in Table A-15
Added:
Pull-up columns to signal table,
Example for PLL Filter calculation,
Thermal values for junction to board and package,
BGND pin pull-up
Part Order Information
Global Register Table
Chip Configuration Summary
Device specific info on CRG
Modified:
Reduced Wait and Run IDD values
Mode of Operation chapter
Changed leakage current for ADC inputs down to +-1uA
Minor modification of PLL frequency/ voltage gain values
Corrected:
Pin names/functions on 80 pin packages
Interrupt vector table enable register inconsistencies
PCB layout for 80QFP VREGEN position
Corrected:
Register address mismatches in 1.5.1
Removed document order no. from Revision History pages
Renamed "Preface" section to "Derivative Differences and
Document references". Added details for derivatives missing
CAN0/1/4, BDLC, IIC and/or Byteflight
Added 2L40K mask set in section 1.6
Added OSC User Guide in Preface, “Document References”
Added oscillator clock connection to BDM in S12_CORE in fig 3-1
Corrected several register and bit names in “Local Enable” column
of Table 5.1 Interrupt Vector Locations
Section HCS12 Core Block Description: mentioned alternate clock
of BDM to be equivalent to oscillator clock
Added new section: “Oscillator (OSC) Block Description”
Corrected in footnote of Table "PLL Characteristics": fOSC = 4MHz
Freescale Semiconductor
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Номер в каталогеОписаниеПроизводители
SC102202nullDevice User GuideFreescale Semiconductor
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SC102203nullDevice User GuideFreescale Semiconductor
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SC102204nullDevice User GuideFreescale Semiconductor
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SC102205nullDevice User GuideFreescale Semiconductor
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