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PDF NJU6541A Data sheet ( Hoja de datos )
| Número de pieza | NJU6541A | |
| Descripción | LCD Driver | |
| Fabricantes | NJR Corporation | |
| Logotipo |  |
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Preliminary NJU6541A
Static 1/2 1/3 1/4 Duty LCD Driver
www!.dataGshEeNet4EuR.coAmL DESCRIPTION
The NJU6541A is a Static or 1/2,1/3,1/4 duty segment
type LCD driver. It incorporates 4 common driver circuits
and 120 segment driver circuits. The NJU6541A can
drive maximum 480 segments in 1/4 duty ratio, and can
use I2C F/S mode.
In addition, the NJU6541A's useful functions meet a
wide range of applications.
! PACKAGE OUTLINE
! FEATURES
# LCD driving circuit
NJU6541A
:Max. 120outputs (4 outputs as for general purpose ports)
# Programmable Duty Ratio
Static
:Driving max. 120 segments
1/2 Duty Ratio
:Driving max. 240 segments
1/3 Duty Ratio
:Driving max. 360 segments
1/4 Duty Ratio
:Driving max. 480 segments
# General Purpose Port :Driving max 4outputs (SEG1-SEG4:4outputs as for general purpose ports)
# Key Scan Function
:Max 30Key(5-out x 6-in matrix)
# Programmable Bias Ratio
:1/2, 1/3 bias ratio (Static:1/1)
# I2C-bus Interface
:F/S mode slave address 0111_000*
(*: Read/ Write mode distinction: 0=write, 1=read)
# Oscillator
:CR oscillation with external resistor and capacitance, or external oscillation
signal input
# Operating Wave Form :A wave form, B wave form
# Electrical Variable Resistance :8-steps
# Power ON Initialize Circuit On-Chip
# Useful Instruction Set :Duty select, Bias select, Wave form select, Oscillation select, Segment or general
purpose ports select, Segment or Key scan output select, E.V.R select,
Display ON/OFF, Key scan ON/OFF
# Operating Voltage
:3.0V / 5.0V
# C-MOS Technology :P-Sub
# Package Outline
:LQFP144 20mm*20mm t=1.7mm(max) Pin-pitch=0.5mm
! BLOCK DIAGRAM
REQ S5 K1- K6 COM1
COM4
SEG1/P1 SEG4/P4 SEG5 SEG115 SEG117/S1 SEG120/S4
VDD
V0
V1
EVR
Key Scan
Common
Driver
Segment Driver
V2
Latch
V3
VSS
OSC
SDA
DNC
SCL
RSTB
TEST
VSS
OSC
Display Reg
I2 C Control
Decoder
Command Reg
Power ON Reset
Ver.2009-04-02
-1-
1 page  
Preliminary NJU6541A
(2) I2C Serial Data Transfer
The NJU6541A transfer of data comply with I2C specification.
Data format is show below(Fig1). After input the slave address, the input of the instruction data or the display
data becomes possible.
www.datasheet4u.Scom
Slave address
Write A
Instruction
A
Instruction
AP
SCL
12
789123
89
123
89
SDA
RW ACK D7 D6 D5
D0 ACK
D7 D6 D5
D0 ACK
MSB
S: Start condition
A: Acknowledge
P: Stop condition
Sｒ: Repeat start condition
LSB MSB
LSB
Fig1
MSB
LSB
After input the instruction data, It becomes possible to write the display data continuously by setting the
display address.
S
SCL
Slave address
12
7
Write
8
A
9
Instruction
123
A Address set A
Display data
A
89123
89123
89
P
SDA
RW ACK D7 D6 D5
D0 ACK D7 D6 D5
D0 ACK D7 D6 D5
D0 ACK
MSB
S: Start condition
A: Acknowledge
P: Stop condition
Sｒ: Repeat start condition
LSB MSB
LSB MSB
Fig2
LSB MSB
LSB
However, after setting the display address, it becomes possible to input only the display data. Therefore, the
acceptance of the instruction data is impossible as long as the repeat start condition or the stop condition is
not executed.
Display data
A
Slave address
A Instruction
A
SCL
123
89
123
89123
89
D7 D6 D5
D0 ACK
SDA
D7 D6 D5
D0 ACK D7 D6 D5
D0 ACK
MSB
S: Start condition
A: acknowledge
P: Stop condition
Sｒ: Repeat start condition
LSB
MSB
LSB MSB
LSB
Fig3
1) Start condition
A fall edge of the SDA terminal while the SCL terminals “H”, which situation define the Start conditions.
2) Slave address
First bite defines the slave address of the NJU6541A. Slave address is (0111_000*). When the NJU6062
acknowledge coincidence its own address with the address in the first byte, it output the acknowledge just
the first byte( at ninth bit timing) through the SDA terminal.
3) Read/Write condition
The data is R/W signal in the first byte( at eighth bit timing) . The eighth bit timing “H” is write. The eighth
bit timing “L” is read.
4) Data
After 2nd bite, transfer the display bite. After input the slave address, the input of the instruction data or
the display data(series) becomes possible.
5) Stop condition
A rise edge of the SDA terminal while the SCL terminal is “H”, which situation defines the STOP condition.
6) Repeat start condition
After start condition set, a fall edge of the SDA terminal while the SCL terminals “H”, which situation next
data read start.
Ver.2009-04-02
-5-
5 Page 
Preliminary NJU6541A
(8) Output Address Counter
Output Address Counter will specify the addresses of the SEG and COM drivers for the display data.
When the MSB (D7 to D6) of the 1st data is “01”, the LSB 6 bits (D5 to D0) specify the addresses of COM and
SEG drivers, and the 2nd data is the display data which will be sent to the 1st-data-specified drivers. At the
www.datassahmeeet4uti.mcoem, SEG and COM driver addresses will be increased automatically shown in Table 1. In other words,
as of the SEG and COM driver addresses specified by the first data in the Output Address Counter, display
data can be transferred to the SEG and COM drivers without further address setting.
The address setting range is from "00_0000" to "11_1110. if the data transferred additionally , then it will be
reset to “00_0000” and renew the auto-increment operation. If it set the data without range by Duty select, the
data can not show the display.
Output Address counter default setting
Output Address counter
(C1, C0, S3, S2, S1, S0)=(0, 0, 0, 0, 0, 0)
• Address Data
D7 D6 D5 D4 D3 D2 D1 D0
0 1 C1 C0 S3 S2 S1 S0
Flag bits
COM driver Address
SEG driver Address
Address range depend on Duty
DUTY
1/1
1/2
1/3
1/4
Address range
00_0000～00_1110
00_0000～01_1110
00_0000～10_1110
00_0000～11_1110
Address range＝[C1][C0]_[S3][S2][S1][S0]
Ver.2009-04-02
- 11 -
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NJU6541A.PDF ] | |
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