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PDF NM29A040 Data sheet ( Hoja de datos )

Número de pieza NM29A040
Descripción (NM29A040 / NM29A080) 4-Mbit/8-Mbit CMOS Serial FLASH E2PROM
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! NM29A040 Hoja de datos, Descripción, Manual

February 1996
NM29A040 080
www.datasheet4u.4co-mMbit 8-Mbit CMOS Serial FLASH E2PROM
General Description
The NM29A040 080 are 4-Mbit and 8-Mbit Flash memories
designed with a MICROWIRETM serial interface All of the
features of the device are designed to provide the most cost
effective solution for applications requiring low bandwidth
file storage Examples of these applications include digital
answering machines and personal digital recorders (digital
audio) or FAX and digital scanners (digital imaging) The
Serial Flash requires only a single 5V power supply has a
small erase block size (4 kbytes) and a low EMI serial inter-
face
The NM29A040 080 have been designed to work seam-
lessly with National’s CompactRISCTM family (e g
NSAM266) of processors In this manner National is able to
provide the complete system solution to digital audio re-
cording (processor CODEC Flash memory software) or
digital imaging
Features
Y Single 5V g10% power supply
Y 4 kbyte erase block
Y Organized as 128 (256) Blocks per 4-Mbit (8-Mbit)
Device
128 pages per block
32 bytes per page (256 bits)
Y MICROWIRETM compatible interface
Y Low operating current (typical)
5 mA read current
15 mA write current
10 mA erase current
5 mA standby current
Y 100k write erase cycle endurance
Y Offered in PLCC and SOIC packages
Block Diagram
TL D 12475 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRETM SpeechProTM CompactRISCTM and CompactSPEECHTM are trademarks of National Semiconductor Corporation
C1996 National Semiconductor Corporation TL D 12475
RRD-B30M36 Printed in U S A
http www national com

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NM29A040 pdf
Device Operation (Continued)
BLOCK ERASE
The Block Erase sequence erases a specified block (4 kB)
of data Flash memory devices require that a block be in an
erased state prior to writing to a memory cell In this man-
ner a block must be erased prior to the recording of any
www.datasheet4u.cmomessages or storage of any images
reading out the same page the first bit shifted in will be the
first bit shifted out If for example only 5 bytes are shifted in
written to the array and then the same page is read out 27
bytes should be shifted out before the original 5 bytes will
be shifted out See Note 4 in the notifications section for an
explanation of multiple page writes and masking
TL D 12475 – 7
FIGURE 4 Block Erase Sequence
Functional Description
ORGANIZATION
The NM29A040 080 are 4-Mbit and 8-Mbit devices respec-
tively organized as 128 256 blocks of 128 pages A block is
the smallest unit that can be erased and is 4 kbytes in size
Within a block are 16 rows of 8 pages each row 256 bytes
long Each page is 32 bytes long Read and write operations
always operate on a page at a time
TL D 12475 – 8
FIGURE 5 Device Organization
Reading or writing data to the Serial Flash involves clocking
data into or out of the data register The data register is a
32-byte wide shift register equivalent in size to one page
When shifting in a full page writing to the array and then
TL D 12475 – 9
FIGURE 6 Block Organization
WRITE ONCE BLOCK
The NM29A040 contains 127 blocks (blocks 0 thru block
126) which are fully accessible to the user for reading writ-
ing and erasing The final block number 127 has been set
aslde as a write once block The pages in this block may
only be written to once Once the data is written it may not
be erased In this manner block 127 may be used for stor-
ing system configuration information that cannot be lost
The NM29A080 operates in a similar manner but has 253
blocks that are fully accessible Block 254 contains the un-
usable block information although this block has 256 pages
as opposed to the standard 128 pages
The last block is not accessible through the normal Read
and Write commands Special commands for Read (D0H)
and Write (F0H) are used to perform the last block opera-
tions An erase operation is not available or usable on the
last block
DATA REGISTER
The data register is a 32-byte FIFO that is used to shift data
into or out of the device When a write operation is per-
formed all 32 bytes are written to the currently addressed
page Refer to Note 4 for how to write less than 32 bytes to
a page
The data register may be used as an on-chip holding area
for partial page data For example if data is acquired exter-
nally in 8-byte multiples the data register can be used to
hold each 8-byte segment After the 4th such data segment
an entire page of data will have been accumulated at which
point the write command mat be issued No data may be
shifted into or out of the data register while the device is
busy
READY BUSY OUTPUT
When the Serial Flash device is selected with CS held low
then the DO pin reflects the Ready Busy state of the de-
vice This is true at all times except when reading data out
of the device as in the Get-Status command or the Data-
Shift-Out command When the device is unselected the DO
output is in a high impedance state
5 http www national com

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NM29A040 arduino
Timing Diagrams (Continued)
www.datasheet4u.com
Read and Data-Shift-Out Timing
Write Timing
Erase Timing
TL D 12475 – 19
TL D 12475 – 20
TL D 12475 – 21
11 http www national com

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