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PDF NJW1149A Data sheet ( Hoja de datos )
| Número de pieza | NJW1149A | |
| Descripción | Audio Processor | |
| Fabricantes | JRC | |
| Logotipo |  |
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NJW1149A
Audio Processor with Sound Enhancement and TruSurround 5.1ch Virtualizer
s GENERAL DESCRIPTION
The NJW1149A is an audio processor with BBE sound enhancement
and SRS Labs' TruSurround 5.1 channel virtualizer. It includes all of
functions processing audio signal for TV, such as volume, balance, mute,
tone control, eala NJRC surround and simulated stereo functions. All of
internal status and variables are controlled by I2C BUS.
The NJW1149 is available for Virtual Dolby Surround or Virtual Dolby
Digital with Dolby Pro Logic or Dolby Digital system*.
s PACKAGE OUTLINE
NJW1149AFH1
*For use in Virtual Dolby Surround(VDS) and/or Virtual Dolby Digital(VDD) products, please contact
Dolby Laboratories for licensing information. Dolby and the double-D symbol are trademarks of Dolby
Laboratories Licensing Corporation. Licensing and application information may be obtained from Dolby
Lab.
s FEATURES
q Operating Voltage
8 to 10 V
q I2C BUS Interface
q TruSurround 5.1ch. / 4ch. / 2ch. Inputs
q BBE
0dB to +15dB(0.5dB/step)
q eala (surround effect ; 2 steps) and Simulated Stereo
qVolume
0 to -80dB, MUTE (0.33dB/step)
qBalance
0 to -30dB, MUTE (1dB/step)
qTone Control
-15dB to +15dB(0.5dB/step)
q Bi-CMOS Technology
q Package Outline
QFP64-H1
s BLOCK DIAGRAM
L IN
R IN
FL IN
FR IN
ATT
ATT
RL IN
RRIN
C IN
SW IN
+
-
Vol1
Vol1
BBE Tone Vol2 Buffer
BBE Tone Vol2 Buffer
Bias
CBH
CBL
CVA
CVB
CTH
CTL
CSR
V+
GND
–1–
1 page  
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NJW1149A
s I2C BUS CHARACTERISTICS (SDA, SCL)
I2C BUS Load Conditions: Pull up resistance 4kΩ (Connected to +5V), Load capacitance 200pF (Connected to GND)
PARAMETER
SYMBOL MIN. TYP. MAX. UNIT
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Low Level Output Voltage (3mA at SDA pin)
Maximum Output Current
Maximum Clock Frequency
Data Change Minimum Waiting Time
Data Transfer Start Minimum Waiting Time
Low Level Clock Pulse Width
High Level Clock Pulse Width
Minimum Start Preparation Waiting Time
Minimum Data Hold Time
Minimum Data Preparation Time
Rise Time
Fall Time
Minimum Stop Preparation Waiting Time
VIH 3.0 - 5.0 V
VIL 0 - 1.5 V
IIH - - 10 µA
IIL - - 10 µA
VOL 0 - 0.4 V
IOL -3.0 -
- mA
fSCL - - 100 kHz
tBUF 4.7 - - µs
tHD:STA
4.0
-
-
µs
tLOW
4.7 -
-
µs
tHIGH 4.0 - - µs
tSU:STA
4.7
-
-
µs
tHD:DAT
0
- 3.45 µs
tSU:DAT
250
-
-
ns
tR - - 1.0 µs
tF - - 300 ns
tSU:STO
4.0
-
-
µs
SDA
tBUF
SCL
tR
tHD:STA tLOW
PS
tF
tHD:DAT
tHIGH
tSU:DAT
tHD:STA
tSU:STA
Sr
tSU:STO
P
–5–
5 Page 
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PIN SYMBOL
NO.
FUNCTION
21 GND Ground
28 V+ Power Supply
29 VREF Reference Voltage
Capacitor
30 CTL Tone Control Bass
switching noise
rejection Capacitor
31 CTH Tone Control Treble
switching noise
rejection Capacitor
NJW1149A
EQUIVALENT CIRCUIT
TERMINAL
VOLTAGE
--
- V+
200k
V+/2
200k
36k VREF-0.7V
– 11 –
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet NJW1149A.PDF ] | |
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