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PDF NJU26206 Data sheet ( Hoja de datos )
| Número de pieza | NJU26206 | |
| Descripción | ProLogicII /VDS/BM/PEQ / QFP48-N2 | |
| Fabricantes | JRC | |
| Logotipo |  |
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NJU26206
Dolby Pro Logic IIx / Virtual Dolby Surround Decoder
General Description
The NJU26206 processes the stereo matrix-encoded signal(Lt/Rt) or normal stereo
signal into spacious sound of 7.1(max) channels by Dolby Pro Logic IIx.
The NJU26206 provides not only Dolby Pro Logic IIx but also Virtual Dolby Surround,
Bass Management, Multi channel input, 5 Band PEQ, and Lip-Sync Delay function.
The NJU26206 is suitable for multi-channel products such as Car Audio, or 2 channel
products such as LCD-TV, and Plasma-TV.
■Package
NJU26206FN2
Features
-Software
Dolby Pro Logic II
Dolby Pro Logic IIx (Max 7.1ch Output)
Virtual Dolby Surround (algorithm of Dolby Laboratories)
Bass Management
5 Band PEQ
Lip-Sync Delay function (Digital Audio Delay)
Sampling Frequency
32kHz/44.1kHz/48kHz (In Master mode, DSP can’t generate a required system clock 44.1kHz of sampling frequency.)
-Hardware
24bit Fixed-point Digital Signal Processing
Maximum Clock Frequency : 12.288MHz(Standard), built-in PLL Circuit
Digital Audio Interface
Digital Audio Format
: 4 Input ports / 4 Output ports
: I2S 24bit, left-justified, right-justified,
Master / Slave Mode
- In Master mode, MCK : 256fs @fs=48kHz / 384fs @fs=32kHz
Microcomputer Interface
- I2C Bus (Standard-mode/100kbps, Fast-mode/400kbps)
- 4 -Wire Serial Bus (4-Wire: Clock, Enable, Input data, Output data)
Operating Voltage
Input Terminal
: VDD = VDDPLL = 1.8V
: VDDIO = 3.3V
: 5.0V Input tolerant
Package
: QFP48-N2 (Pb-Free)
BCK : 32fs/64fs
* The detail hardware specification of the NJU26206 is described in the “ NJU26200 Series Hardware Data Sheet”.
Ver.2006-12-21
-1-
1 page  
www.DataSheet4U.com
Pin Description
Table 1 Pin Description
Pin No.
Symbol
1,11,20,32,40 VDDIO
2 BCKI
3,10,19,31,41 VSSIO
4,15,30,42 VSS
5,16,29,43 VDD
6 TEST
7 MUTEb *
8 WDC *
9 PROC *
12 SEL
13 VDDPLL
14 VSSPLL
17 CLKOUT
18 CLK
21 RESETb
22 TEST
23,24
TEST
25 AD1/SDIN
26 AD2/SSb
27 SCL/SCK
28 SDA/SDOUT
33 MCK
34 BCKO
35 LRO
36 SDO3
37 SDO2
38 SDO1
39 SDO0
44 SDI3
45 SDI2
46 SDI1
47 SDI0
48 LRI
I : Input
O : Output
OD : Open Drain Output
I/O : Bi-directional
NJU26206
I/O Function
- I/O Power Supply +3.3V
I Bit Clock Input
- I/O GND
- Core GND
- Core Power Supply +1.8V
I for test (connected to VSSIO through 3.3kΩ resistance.)
I Master Volume level, After Reset DSP (“1” : 0dB , “0” : Mute)
OD Clock for Watch Dog Timer (Open Drain Output)
I After Reset DSP. ( “1” : Normal , “0” : Wait from Command )
I Select I2C or Serial bus ( ‘1’ : Serial , ‘0’ : I2C-Bus)
- PLL Analog Power Supply +1.8V
- PLL Analog GND
O OSC Output
I X’tal Clock Input (12.288MHz)
I Reset (RESETb=’0’ : DSP Reset)
I for Test (Connect to VDDIO)
I for Test (Connect to VSSIO)
I I2C Address / Serial Input
I I2C Address / Serial Enable
I I2C Clock / Serial Clock
I2C I/O (Open Drain output) / Serial Output (CMOS output)
I/O I2C Bus mode : SDA pin requires a pull-up resistance.
4-wire Serial mode : SDOUT does not require a pull-up resistance.
O Master Clock Output (CLK Terminal=27pin Buffer Out)
O Bit Clock Output
O LR Clock Output
O Audio Data Output 3 (SL/SR)
O Audio Data Output 2 (C/ SW)
O Audio Data Output 1 (L/R)
O Audio Data Output 0 (LB/LR)
I Audio Data Input 3
I Audio Data Input 2
I Audio Data Input 1
I Audio Data Input 0
I LR Clock Input
Note: Pins symbol with * : Connect with VDDIO or VSSIO through 3.3kΩ resistance
Ver.2006-12-21
-5-
5 Page 
www.DataSheet4U.com
Package Dimensions ( QFP48-N2, Pb-Free )
NJU26206
Ver.2006-12-21
BASE OF MOLDING
MOLD MATERIAL : EPOXY RESIN
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
- 11 -
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| PDF Descargar | [ Datasheet NJU26206.PDF ] | |
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