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PDF HD74LV2GT32A Data sheet ( Hoja de datos )

Número de pieza HD74LV2GT32A
Descripción Dual 2-input OR Gates / CMOS Logic Level Shifter
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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HD74LV2GT32A
Dual 2-input OR Gates / CMOS Logic Level Shifter
REJ03D0142–0200Z
(Previous ADE-205-667A (Z))
Rev.2.00
Oct.16.2003
Description
The HD74LV2GT32A has dual two-input OR gates in an 8 pin package. The input protection circuitry on
this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level
translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS
Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is suitable
for the battery powered products (e.g., notebook computers), and the low power consumption extends the
battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
HD74LV2GT32AUSE SSOP-8 pin
Package Code
TTP-8DBV
Package
Abbreviation
US
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Rev.2.00, Oct.16.2003, page 1 of 7

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HD74LV2GT32A
Switching Characteristics
VCC = 3.3 ± 0.3 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Min Typ
— 7.0
— 7.5
Max
10.0
12.0
Ta = –40 to 85°C
Test
FROM
Min Max Unit Conditions (Input)
1.0 12.0 ns CL = 15 pF A or B
1.0 14.0
CL = 50 pF
TO
(Output)
Y
VCC = 5.0 ±0.5 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Min Typ
— 5.0
— 5.5
Max
6.9
7.9
Ta = –40 to 85°C
Test
FROM
Min Max Unit Conditions (Input)
1.0 8.0 ns CL = 15 pF A or B
1.0 9.0
CL = 50 pF
TO
(Output)
Y
Operating Characteristics
CL = 50 pF
Item
Power dissipation
capacitance
Symbol
CPD
Ta = 25°C
VCC (V) Min
Typ
5.0 —
11.5
Max Unit
— pF
Test Conditions
f = 10 MHz
Test Circuit
VCC
Pulse
generator
Input
50
Output
CL
Note: Operating current test time, output is open.
Rev.2.00, Oct.16.2003, page 5 of 7

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