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PDF NCP2830 Data sheet ( Hoja de datos )
| Número de pieza | NCP2830 | |
| Descripción | Class D Audio Amplifier | |
| Fabricantes | ON Semiconductor | |
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NCP2830
1W Constant Filterless
Class-D Audio Amplifier
NCP2830 is a cost effective mono audio power amplifier designed
for portable communication device applications such as mobile
phones. Due to its integrated charge pump structure, this part is
capable of delivering 1 W of continuous average power to an 8.0 W
Bridge Tied Load no matter the voltage provided by a lithium/Ion
battery.
NCP2830 is a preferred solution for long playback audio with
minimum space required.
Added to a fast start−up time of 200 ms and a −88dB PSRR, the
NCP2830 audio power amplifier is specifically designed to provide
high quality and level output power from low supply voltage,
requiring very few external components.
Features
• 1 W to 8 W load for VDD from 2.7 V up to 5.5 V
• High quality audio (THD+N = 0.04%)
• Low noise: SNR up to 100 dB
• Very Fast Turn On Time: 200 ms
• Overall system efficiency optimization: up to 89%
• Superior PSRR (−88 dB): Direct Connection to Battery
• Very Low Quiescent Current 7 mA
• Optimized PWM Output Stage: Filterless Capability
• Selectable gain of 2 V/V or 4 V/V
• Fully Differential Capability:
• Thin QFN 3x3 mm, 20 pins
• This Device uses Halogen−Free Molding Compound
• This is a Pb−Free Device
www.DatTaySpheiceat4l UA.cpopmlications
• Cellular Phones and Digital Cameras
• Personal Digital Assistant and Portable Media Player
• Audio Accessories
• GPS
Battery
+
− C1
4.7 mF
6.3 V
Digital Control
Audio Inputs
C2
4.7 mF
6.3 V
2.2 mF, C3
6.3 V
C1P
PVDD
AVDD
WM
GS
SD
C4
C1N C2P
2.2 mF,
6.3 V
C2N
VB_OUT
VB_IN
NCP2830
1 mF
1 mF
C7 INM
OUTM
C8
INP
PGND_D PGND_CP
AGND
RES1 RES2
OUTP
C5
10 mF,
6.3 V
C6
10 mF,
6.3 V
Figure 1. Typical Application Circuit
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UQFN20
MU SUFFIX
CASE 523AL
MARKING
DIAGRAM
20
1
XXXX
ALYWG
G
XXXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
20 19 18 17 16
INP 1
INM 2
AGND 3
AVDD 4
WM 5
15 VB_OUT
14 C1P
13 C2P
12 PVDD
11 RES1
6 7 8 9 10
(TOP VIEW)
20−Pin 3 x 3 x 0.50 mm QFN
Exposed pad must be soldered to
PCB Ground Plane
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 0
1
Publication Order Number:
NCP2830/D
1 page  
NCP2830
ELECTRICAL CHARACTERISTICS Min and Max Limits apply for TA between −40°C to +85°C and TJ up to + 125°C for VIN
between 2.5 V to 5.5 V (Unless otherwise noted). Typical values are referenced to TA = + 25°C and VIN = 3.6 V (Note 8)
Symbol
Parameter
Conditions
Min Typ Max Unit
GLOBAL SYSTEM
VDD Operating System Voltage
ISD Shutdown Current
ISD Shutdown Current
VSD = low, VGS = Low, VWM = Low
VSD = low, VGS = Low, VWM = Low, Vp
= 5.5 V (Note 9)
2.7 − 5.5
− 0.01 −
− − 1.5
V
mA
mA
IQ Quiescent Current
IQ Quiescent Current
IQ Quiescent Current
RSD Resistance from SD to GND
RWM
Resistance from WM to GND
RGS Resistance from GS to GND
VIH Digital Pins High Voltage
VIL Digital Pins Low Voltage
BOOST SECTION
2X Mode, No load
1.5X Mode, No load
Wire Mode, No load
− 9.5 11
−78
− 3 4.5
− 350 −
− 350 −
− 350 −
1.2 −
−
− − 0.4
mA
mA
mA
kW
kW
kW
V
V
FSW1
VB
Charge Pump Switching Frequency
Output Regulated Voltage
No Load, VINM=VINP=0, VWM= Low, 2X
Mode
550 650
4.75 5
750
5.25
kHz
V
VB Output Regulated Voltage
No Load, VINM = VINP = 0, VWM = Low, 4.75 5 5.25
1.5X Mode
V
VB−Ripple
Output Voltage Ripple
No Load, VINM = VINP = 0, VWM = Low,
−
7
−
mV
2X Mode or 1.5X Mode
TPrecharge
VTR1
Precharge time
Transition Voltage between 2X Mode
and 1.5X Mode
C5 = C6 = 10 mF
− 1.6 −
− 3.8 −
ms
V
VTR2
Transition Voltage between 2X Mode
and Wire Mode
− 4.65 −
V
CLASS D SECTION
www.DataSFhSeWe2t4U.com Class D Switching frequency
275 325 375
kHz
RINL
Audio Input resistance
VGS = Low (Note 10)
− 15 −
kW
RINH
Audio Input resistance
VGS = High (Note 10)
− 7.5 −
kW
ZSD Shutdown impedance
VSD = Low
− 20 −
kW
GHI Gain High
GLO Gain Low
VGS = High, RL = 8 W
VGS = Low, RL = 8 W
1.85 2 2.15 V/V
3.7 4 4.3 V/V
VOS Output Offset Voltage
VINM = VINP = 0
− 1 − mV
Tstart
Turn ON time
VB = VDD, VSD = High
− 200 −
ms
TOFF
Turn Off time
− 1 − ms
VN Output Noise Voltage
VN Output Noise Voltage
No Filter
A−Weighting filter
− 56 − mVRMS
− 37 − mVRMS
THD+N
Total harmonic distortion + Noise
Pout = 0.25 W, f = 1 kHz, RL = 8 W
− 0.04 −
%
THD+N
Total harmonic distortion + Noise
Pout = 1 W, f = 1 kHz, RL = 8 W
− 0.2 −
%
8. Performances guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
TJ = TA = 25°C.
9. The maximum value is measured at 85°C
10. Guaranteed by design
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5
5 Page 
NCP2830
DETAIL OPERATING DESCRIPTION
C1
4.7mF
0
C2
4.7mF
0
0
0
0
PVDD
PVDD
WM
VB_in
0
AVDD
SD
AGND
ANALOG
2.2mF C3
2.2mF C4
Mode
FSW2
CHARGE PUMP
SWITCHES
MATRIX
WM
OUT
+
−
+
− Vref
0
0
PGND_CP
VB_out
VBOUT
VB_in
VBIN
0
Vref
FSW1
FSW2
Mode
FSW1
VB_out
GS
INM
7.5k
7.5k
INP
7.5k
GS
7.5k
15k
+
−
15k
PWM
Modulator
OUTM
0
VB_out
OUTP
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RES2 RES1 PGND_D
0
C6
10mF
0
C5
10mF
0
0
Figure 25. Functional Block Diagram
Detailed Descriptions
The NCP2830 consists of two parts: a DC−DC converter
and a mono class D amplifier. These two parts are strongly
matched in order to obtain the best operation of the global
system.
DC−DC CONVERTER
The DC−DC converter is based on a charge pump
technique. The switching frequency is synchronized with
the class D amplifier (FSW2 = 2 x FSW1) in order to avoid
mixing frequency. The regulation is based on a voltage
regulation. The output voltage is permanently monitored
through a resistor ladder and compared to an internal
reference. An error amplifier and a voltage to current
conversion allow injecting in the Capacitors C3 and C4 the
necessary current to maintain 5 V in output. This linear
regulation reduces the output voltage ripple (7 mV typ) and
allows a noise free operation.
Turn ON/OFF sequence
The turn ON and turn OFF sequence has been adapted to
an audio applications environment. When the battery
voltage is connected to the VDD pins, the output capacitance
is precharged to the VDD voltage. When VSD is High, the
charge pump is activated and the output voltage rises up to
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet NCP2830.PDF ] | |
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