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NBXDBA014 PDF даташит

Спецификация NBXDBA014 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «62.5 MHz / 125 MHz LVPECL Clock Oscillator».

Детали детали

Номер произв NBXDBA014
Описание 62.5 MHz / 125 MHz LVPECL Clock Oscillator
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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NBXDBA014 Даташит, Описание, Даташиты
NBXDBA014
3.3 V, 62.5 MHz / 125 MHz
LVPECL Clock Oscillator
The NBXDBA014 dual frequency crystal oscillator (XO) is
designed to meet today's requirements for 3.3ĂV LVPECL clock
generation applications. The device uses a high Q fundamental crystal
and Phase Lock Loop (PLL) multiplier to provide selectable
62.5ĂMHz or 125 MHz, ultra low jitter and phase noise LVPECL
differential output. This device is a member of ONĂSemiconductor's
PureEdget clock family that provides accurate and precision clock
solutions.
Available in 5 mm x 7 mm SMD (CLCC) package on 16 mm tape
and reel in quantities of 1,000.
Features
ăLVPECL Differential Output
ăUses High Q Fundamental Mode Crystal and PLL Multiplier
ăUltra Low Jitter and Phase Noise - 0.4 ps (12 kHz - 20 MHz)
ăSelectable Output Frequency - 62.5 MHz / 125 MHz
ăFrequency Stability - ±50 PPM
ăHermetically Sealed Ceramic SMD Package
ăRoHS Compliant
ăOperating Range 3.3 V ±10%
ăThis is a Pb-Free Device
Applications
ăFiber Distributed Data Interface
ăEthernet, Gigabit Ethernet
ăInfiniband
ăPCIe
www.DataSăHheoest4t UB.ucosmAdapter
ăRAID Controller
VDD
6
CLK CLK
54
http://onsemi.com
MARKING DIAGRAM
6 PIN CLCC
LN SUFFIX
CASE 848AB
DBA014
62.5/125.0
AWLYYWW
DBA014 = NBXDBA014 (±50 PPM)
62.5/125.0 = Output Frequency
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package Shipping
NBXDBA014LN1TAG CLCC-6 1000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Crystal
PLL
Clock
Multiplier
1 23
OE
FSEL
GND
Figure 1. Simplified Logic Diagram
©Ă Semiconductor Components Industries, LLC, 2007
August, 2007 - Rev. 1
1
Publication Order Number:
NBXDBA014/D









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NBXDBA014 Даташит, Описание, Даташиты
NBXDBA014
OE 1
FSEL 2
6 VDD
5 CLK
GND 3
4 CLK
Figure 2. Pin Connections (Top View)
Table 1. PIN DESCRIPTION
Pin No.
1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ4
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ5
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ6
Symbol
OE
FSEL
GND
CLK
CLK
VDD
I/O
LVTTL/LVCMOS
Control Input
LVTTL/LVCMOS
Control Input
Power Supply
LVPECL Output
LVPECL Output
Power Supply
Description
Output Enable Pin. When left floating pin defaults to logic HIGH and output is active.
See OE pin description Table 2.
Output Frequency Select Pin. Pin will default to logic HIGH when left open. See Output
Frequency Select pin description Table 3.
Ground 0 V
Non-Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD - 2 V.
Non-Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD - 2 V.
Positive power supply voltage. Voltage should not exceed 3.3 V ±10%.
Table 2. OUTPUT ENABLE TRI-STATE FUNCTION
OE Pin
Output Pin
Open
Active
HIGH Level
Active
LOW Level
High Z
Table 3. OUTPUT FREQUENCY SELECT
FSEL Pin
Output Frequency (MHz)
Open
(pin will float high)
62.5
HIGH Level
62.5
LOW Level
125
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Table 4. ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model
Machine Model
2 kV
200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
Table 5. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Units
VDD Positive Power Supply
Iout LVPECL Output Current
GND = 0 V
Continuous
Surge
4.6 V
25 mA
50
TA Operating Temperature Range
-40 to +85
°C
Tstg Storage Temperature Range
-55 to +120
°C
Tsol Wave Solder
See Figure 6
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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NBXDBA014 Даташит, Описание, Даташиты
NBXDBA014
Table 6. DC CHARACTERISTICS (VDD = 3.3 V ± 10%, GND = 0 V, TA = -40°C to +85°C)
Symbol
Characteristic
Conditions
Min.
Typ.
Max.
Units
IDD Power Supply Current (Note 2)
VIH OE and FSEL Input HIGH Voltage
VIL OE and FSEL Input LOW Voltage
IIH Input HIGH Current
OE
FSEL
2000
GND - 300
-100
-100
50
65
VDD
800
+100
+100
mA
mV
mV
mA
IIL Input LOW Current
OE
FSEL
-100
-100
+100
+100
mA
VOH Output HIGH Voltage (Note 2)
VDD = 3.3 V
VDD-1145
2155
VDD-895
2405
mV
VOL Output LOW Voltage (Note 2)
VDD = 3.3 V
VDD-1945
1355
VDD-1600
1700
mV
VOUTPP
Output Voltage Amplitude (Note 2)
780 mV
NOTE: NBX circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
2. Measurement taken with outputs terminated with 50 ohm to VDD-2 V.
Table 7. AC CHARACTERISTICS (VDD = 3.3 V ± 10%, GND = 0 V, TA = -40°C to +85°C)
Symbol
Characteristic
Conditions
Min.
fCLKOUT
Output Clock Frequency
FSEL = HIGH
FSEL = LOW
Typ.
62.5
125
Max.
Units
MHz
Df
Frequency Stability NBXDBA014
10 Years Aging
±50 ppm
FNOISE
Phase-Noise Performance
fCLKout = 62.5 MHz/125 MHz
100 Hz of Carrier
1 kHz of Carrier
-111/104
-129/-123
dBc/Hz
dBc/Hz
10 kHz of Carrier
-138/-132
dBc/Hz
100 kHz of Carrier
-141/-135
dBc/Hz
1 MHz of Carrier
-141/-135
dBc/Hz
10 MHz of Carrier
-159/-156
dBc/Hz
tjit(F)
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RMS Phase Jitter
Cycle to Cycle, RMS
Cycle to Cycle, Peak-to-Peak
12 kHz to 20 MHz
1000 Cycles
1000 Cycles
0.4 0.9 ps
3 10 ps
15 35 ps
Period, RMS
10,000 Cycles
2 5 ps
Period, Peak-to-Peak
10,000 Cycles
10 25 ps
tOE/OD
tDUTY_CYCLE
Output Enable/Disable Time
Output Clock Duty Cycle
(Measured at Cross Point)
200 ns
48 50 52 %
tR Output Rise Time (20% and 80%)
380 620 ps
tF Output Fall Time (80% and 20%)
400 620 ps
tstart Start-up Time
Aging
1st Year
1 5 ms
3 ppm
Every Year After 1st
1 ppm
NOTE: NBX circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
http://onsemi.com
3










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