NBXSBA019 PDF даташит
Спецификация NBXSBA019 изготовлена «ON Semiconductor» и имеет функцию, называемую «Clock Oscillator». |
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Детали детали
Номер произв | NBXSBA019 |
Описание | Clock Oscillator |
Производители | ON Semiconductor |
логотип |
6 Pages
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NBXDBA019, NBXHBA019,
NBXSBA019
3.3 V, 125 MHz / 250 MHz
LVPECL Clock Oscillator
The single and dual frequency crystal oscillator (XO) is designed to
meet today’s requirements for 3.3 V LVPECL clock generation
applications. The device uses a high Q fundamental crystal and Phase
Lock Loop (PLL) multiplier to provide selectable 125 MHz or
250 MHz, ultra low jitter and phase noise LVPECL differential output.
This device is a member of ON Semiconductor’s PureEdget clock
family that provides accurate and precision clock solutions.
Available in 5 mm x 7 mm SMD (CLCC) package on 16 mm tape
and reel in quantities of 1000.
Features
• LVPECL Differential Output
• Uses High Q Fundamental Mode Crystal and PLL Multiplier
• Ultra Low Jitter and Phase Noise − 0.4 ps (12 kHz − 20 MHz)
• Selectable Output Frequency − 125 MHz (default) / 250 MHz
• Hermetically Sealed Ceramic SMD Package
• RoHS Compliant
• Operating Range 3.3 V ±10%
• Total Frequency Stability − $50 PPM
• This is a Pb−Free Device
Applications
• Ethernet, Gigabit Ethernet
• Infiniband
• Base Stations
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VDD
6
CLK CLK
54
Crystal
PLL
Clock
Multiplier
1 23
OE
FSEL/NC*
GND
Figure 1. Simplified Logic Diagram
*NBXSBA019 and NBXHBA019 only
http://onsemi.com
MARKING
DIAGRAMS
6 PIN CLCC
LN SUFFIX
CASE 848AB
NBXDBA019
125/250
AWLYYWWG
NBXSBA019
250
AWLYYWWG
NBXHBA019
125
AWLYYWWG
125/250
A
WL
YY
WW
G
= Output Frequency (MHz)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package Shipping†
NBXDBA019LN1TAG CLCC−6
1000/
(Pb−Free) Tape & Reel
NBXSBA019LN1TAG CLCC−6
1000/
(Pb−Free) Tape & Reel
NBXHBA019LN1TAG* CLCC−6
1000/
(Pb−Free) Tape & Reel
NBXDBA019LNHTAG CLCC−6
100/
(Pb−Free) Tape & Reel
NBXSBA019LNHTAG CLCC−6
100/
(Pb−Free) Tape & Reel
NBXHBA019LNHTAG* CLCC−6
100/
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
* Please contact sales office for availability
© Semiconductor Components Industries, LLC, 2009
March, 2009 − Rev. 2
1
Publication Order Number:
NBXDBA019/D
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NBXDBA019, NBXHBA019, NBXSBA019
OE 1
FSEL 2
6 VDD
5 CLK
OE 1
NC 2
6 VDD
5 CLK
GND 3
4 CLK
GND 3
4 CLK
NBXDBA019
NBXSBA019/NBXHBA019
Figure 2. Pin Connections (Top View)
Table 1. PIN DESCRIPTION
Pin No.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ4
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ5
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ6
Symbol
OE
FSEL/
NC*
GND
CLK
CLK
VDD
I/O
LVTTL/LVCMOS
Control Input
LVTTL/LVCMOS
Control Input
Power Supply
LVPECL Output
LVPECL Output
Power Supply
Description
Output Enable Pin. When left floating pin defaults to logic HIGH and output is active.
See OE pin description Table 2.
Output Frequency Select Pin. Pin will default to logic HIGH when left open. See Output
Frequency Select pin description Table 3.
Ground 0 V
Non−Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD − 2 V.
Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD − 2 V.
Positive power supply voltage. Voltage should not exceed 3.3 V ±10%.
*NBXSBA019 and NBXHBA019 only.
Table 2. OUTPUT ENABLE TRI−STATE FUNCTION
OE Pin
Output Pins
Open
Active
HIGH Level
Active
LOW Level
High Z
Table 3. OUTPUT FREQUENCY SELECT
FSEL Pin
Output Frequency (MHz)
Open
(pin will float high)
125
HIGH Level
125
LOW Level
250
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Table 4. ATTRIBUTES
Characteristic
Value
Input Default State Resistor
ESD Protection
Human Body Model
Machine Model
170 kW
2 kV
200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
Table 5. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Units
VDD Positive Power Supply
Iout LVPECL Output Current
GND = 0 V
Continuous
Surge
4.6 V
25 mA
50
TA Operating Temperature Range
−40 to +85
°C
Tstg Storage Temperature Range
−55 to +120
°C
Tsol Wave Solder
See Figure 6
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
http://onsemi.com
2
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NBXDBA019, NBXHBA019, NBXSBA019
Table 6. DC CHARACTERISTICS (VDD = 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 2)
Symbol
Characteristic
Conditions
Min.
Typ.
Max.
Units
IDD Power Supply Current
VIH OE and FSEL Input HIGH Voltage
VIL OE and FSEL Input LOW Voltage
IIH Input HIGH Current
OE
FSEL
2000
GND − 300
−100
−100
78
100
VDD
800
+100
+100
mA
mV
mV
mA
IIL Input LOW Current
OE
FSEL
−100
−100
+100
+100
mA
VOH Output HIGH Voltage
VDD = 3.3 V
VDD−1195
2105
VDD−945
2355
mV
VOL Output LOW Voltage
VDD = 3.3 V
VDD−1945
1355
VDD−1600
1700
mV
VOUTPP
Output Voltage Amplitude
660 mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Measurement taken with outputs terminated with 50 ohm to VDD−2 V. See Figure 5.
Table 7. AC CHARACTERISTICS (VDD = 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3)
Symbol
Characteristic
Conditions
Min.
Typ.
Max.
Units
fCLKOUT
Df
Output Clock Frequency
Frequency Stability −
NBXDBA019/NBXSBA019/NBXHBA019
FSEL = HIGH
FSEL = LOW
(Note 4)
125 MHz
250
±50 ppm
FNOISE
Phase−Noise Performance
fCLKout = 125 MHz/250 MHz
(See Figures 3 and 4)
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tjit(F)
tjitter
tOE/OD
tDUTY_CYCLE
RMS Phase Jitter
Cycle to Cycle, RMS
Cycle to Cycle, Peak−to−Peak
Period, RMS
Period, Peak−to−Peak
Output Enable/Disable Time
Output Clock Duty Cycle
(Measured at Cross Point)
100 Hz of Carrier
1 kHz of Carrier
10 kHz of Carrier
100 kHz of Carrier
1 MHz of Carrier
10 MHz of Carrier
12 kHz to 20 MHz
1000 Cycles
1000 Cycles
10,000 Cycles
10,000 Cycles
48
−112/−105
−123/−116
−131/−124
−131/−124
−139/−133
−161/−158
0.4
1
7
0.6
5
50
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
0.9 ps
8 ps
30 ps
4 ps
20 ps
200 ns
52 %
tR Output Rise Time (20% and 80%)
250 400 ps
tF Output Fall Time (80% and 20%)
250 400 ps
tstart Start−up Time
Aging
1st Year
1 5 ms
3 ppm
Every Year After 1st
1 ppm
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Measurement taken with outputs terminated with 50 ohm to VDD−2 V. See Figure 5.
4. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration, and first year aging.
http://onsemi.com
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