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PDF WCMS0808C1X Data sheet ( Hoja de datos )

Número de pieza WCMS0808C1X
Descripción 32Kx8 Static RAM
Fabricantes Weida Semiconductor 
Logotipo Weida Semiconductor Logotipo



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No Preview Available ! WCMS0808C1X Hoja de datos, Descripción, Manual

S0808C1X
WCMS0808C1X
Features
• Low Voltage Range
4.5V–5.5V Operation
• Low active power
— 275 mW (max.)
• Low standby power
28 µW (max.)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The WCMS0808C1X is a high-performance CMOS static
RAM organized as 32K words by 8 bits. Easy memory expan-
sion is provided by an active LOW chip enable (CE) and active
32Kx8 Static RAM
LOW output enable (OE) and three-state drivers. This device
has an automatic power-down feature, reducing the power
consumption by 99.9% when deselected. The
WCMS0808C1X is in the standard 450-mil-wide (300-mil body
width) SOIC and packages.
An active LOW write enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE and WE inputs
are both LOW, data on the eight data input/output pins (I/O0
through I/O7) is written into the memory location addressed by
the address present on the address pins (A0 through A14).
Reading the device is accomplished by selecting the device
and enabling the outputs, CE and OE active LOW, while WE
remains inactive or HIGH. Under these conditions, the con-
tents of the location addressed by the information on address
pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
Logic Block Diagram
Pin Configurations
A10
A9
A8
www.DataSheet4AU7.com
A6
A5
A4
A3
A2
CE
WE
OE
INPUTBUFFER
512x512
ARRAY
COLUMN
DECODER
POWER
DOWN
Narrow SOIC
Top View
A5 1
28 VCC
A6 2
27 WE
I/O0
A7 3
A8 4
26 A4
25 A3
I/O1
A9 5
A10 6
24 A2
23 A1
I/O2
A11 7
A12 8
22 OE
21 A0
I/O3
A13 9
A14 10
I/O0 11
20 CE
19
18
I/O7
I/O6
I/O4
I/O1 12
17 I/O5
I/O2 13
16 I/O4
I/O5
GND 14
15 I/O3
I/O6
I/O7 OE
A1
A2
A3
A4
WE
VCC
A5
A6
A7
A8
A9
A10
A11
22
23
24
25
26
27
28
1
2
3
4
5
6
7
TSOP I
Top View
(not to scale)
21 A0
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
14 GND
13 I/O2
12 I/O1
11 I/O0
10 A14
9 A13
8 A12

1 page




WCMS0808C1X pdf
Switching Waveforms
Read Cycle No. 1[10,11]
ADDRESS
DATA OUT
tOHA
PREVIOUS DATA VALID
tAA
tRC
WCMS0808C1X
DATA VALID
Read Cycle No. 2 [11,12]
CE
tACE
OE
DATA OUT
VCC
SUPPLY
CURRENT
tDOE
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
50%
Notes:
10. Device is continuously selected. OE, CE = VIL.
11. WE is HIGH for read cycle.
12. Address valid prior to or coincident with CE transition LOW.
www.DataSheet4U.com
tRC
DATA VALID
tHZOE
tHZCE
HIGH
IMPEDANCE
tPD
50%
ICC
ISB
*

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