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PDF HE84760B Data sheet ( Hoja de datos )
| Número de pieza | HE84760B | |
| Descripción | 8-bit Micro-controller | |
| Fabricantes | King blillion Electronics | |
| Logotipo |  |
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KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84760B
www.DaHtaES8he0e0t04U4.cSoemries
- Table of Contents -
1. General Description ___________________________________________________________________3
2. Features _____________________________________________________________________________3
3. Functional Block Diagram ______________________________________________________________4
4. Pin Description _______________________________________________________________________4
5. Pad Location ________________________________________________________________________6
6. ROM Map Configurations ____________________________________________________________9
7. External RAM/Flash Memory__________________________________________________________11
8. LCD Display RAM Map ______________________________________________________________13
9. LCD driver configurations_____________________________________________________________14
9.1. 4 Gray Scale LCD Display RAM Map _________________________________________________15
9.2. Black and White LCD Display RAM Map______________________________________________18
10. LCD Power Supply_________________________________________________________________19
11. LCDC Control register______________________________________________________________22
12. Oscillators ________________________________________________________________________23
13. General Purpose I/O _______________________________________________________________25
14. Timer1 ___________________________________________________________________________27
15. Timer2 ___________________________________________________________________________28
16. Time Base ________________________________________________________________________29
17. Watch Dog Timer __________________________________________________________________30
18. Voice Output ______________________________________________________________________30
19. Low Voltage Detection/Reset _________________________________________________________35
20. Infrared output____________________________________________________________________36
21. Universal Asynchronous Receiver/Transmitter__________________________________________37
21.1. Interface Registers _________________________________________________________________38
21.2. Baud Rate Configuration Register ____________________________________________________39
21.3. Interrupt & Identification Register ___________________________________________________40
21.4. Line Control Register_______________________________________________________________41
June 29, 2005
1
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
1 page  
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84760B
www.DaHtaES8he0e0t04U4.cSoemries
Pin Name
LCAP2B
LCAP2A
LCAP1A
LCAP1B
LCAP3A
LVREG
LGS1
LVAG
VDD_LCD(VDDA)
GND_LCD(VSSA)
OAC
OCCK
GND
OPO
OPIP
OPIN
DAO
VO
RSTP_N
FXO,
FXI
TSTP_P
SXO,
SXI
VX
VDD
PRT10[7..0]
PRTD[7..2]
PRTD[1]/SIN
PRTD[0]/SOUT
PRTC[7:0]
VDD_RAM
IRO
PWM
GND_PWM
CMSG[32..79]
Pin # I/O
Description
53 O Charge Pump Capacitor Pin.
54 O Charge Pump Capacitor Pin.
55 O Charge Pump Capacitor Pin.
56 O Charge Pump Capacitor Pin.
57 O Charge Pump Capacitor Pin.
58
O
Voltage Regulator Output. VDD is regulated to generate LVREG, which is in turns
pumped to LVP. Adjust resistor between LGS1 and LVREG to set LVREG voltage.
59 I Regulator Voltage Setting
60 O Reference Voltage Output. Fixed 0.9 Volt DC reference voltage
61 P Power supply for LCD charge-pump.
62 P LCD power system ground.
63 O LCD frame signal for interfacing with LCD segment extender KD80.
64 O LCD data load pin for interfacing with LCD segment extender KD80.
65 P Power ground Input.
66 O Output of OP Amp.
67 I Non-inverting input of OP Amp.
68 I Inverting input of OP Amp.
69 O Alternate output of DAC.
70 O DAC Output.
71
I
System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for
72,
73
O,
B
RC type and ‘1’ for crystal type). For RC type oscillator, one resistor
connected between FXI and GND. For crystal oscillator, one crystal needs
needs to be
to be placed
between FXI and FXO. Please refer to application circuit for details.
74
I
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But
for improving ESD, please connect this point with zero Ohm resistor to GND.
External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
75, O, Time-Base and other internal blocks. Both crystal and RC oscillator are provided. The
76 I slow clock type can be selected by mask option MO_SXTAL. Choose ‘0’ for RC type
and ‘1’ for crystal oscillator.
77
I
Input pin for x32 PLL circuit. Connect to external resistor and capacitors as shown in
application circuit.
78
P
Positive power Input. A 0.1 µF decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.
8-bit bi-directional I/O port 10. The output type of I/O pad can also be selected by mask
79~86
B
option MO_10PP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
pad as input pad, “1” must be outputted before reading.
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask
option MO_DPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
87~94
B
as input, ‘1’ must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.
PRTD[1] shares pad with UART Receiver SIN pin.
PRTD[0] shares pad with UART transmitter SOUT pin.
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask
95~102
B
option MO_CPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, ‘1’ must be outputted before reading the pin.
103 P Dedicated power input for RAM
104 O The Infrared output.
105
O
The PWM output can drive speaker or buzzer directly. Using VDD & PWM to drive
output device.
106 P Dedicated Ground for PWM output.
107~15
4
O
COM[32..79] pads are shared with SEG[95..48] outputs. The functions of the pads to be
COM drivers or SEG drivers can be selected by mask option MO_COM[1..0]. Please
June 29, 2005
5
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
5 Page 
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84760B
www.DaHtaES8he0e0t04U4.cSoemries
Ext. Bus Interface
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
CS3
CS2
CS1
CS0
WE
OE
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
Q0 DQ0
Q1 DQ1
Q2 DQ2
Q3 DQ3
Q4 DQ4
Q5 DQ5
Q6 DQ6
Q7 DQ7
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
A19
A18
A8
A7
A6
A5
A4
A3
A2
A1
CS1
D0
Q1
Q2
Q3
8 MB EPROM
1
2
3
4
A19
A16
A15
5
6
7
8
A12
A7
A6
A5
9
10
11
12
A4
A3
A2
A1
13 A0
14
15
16
Q0
Q1
Q2
VSS
VCC
A18
A17
A14
A13
A8
A9
32
31
30
29
28
27
26
25
A18
A17
A14
A13
A8
A9
A11
A11
OE/VPP
A10
CE
24
23
22
21
A10
CS0
Q7
Q7
Q6
Q5
Q4
20
19
18
17
Q6
Q5
Q4
Q3
Q3
M27C801
16 MB EPROM
1
2 A18
3
4
5
A17
A7
A6
6 A5
7
8
9
10
A4
A3
A2
A1
11 A0
12
13
14
15
CE
VSS
OE
Q0
16
17
18
19
Q8
Q1
Q9
Q2
20 Q10
21
Q3
Q11
42 A20
A19
A8
A9
A10
A11
41
40
39
38
37
A9
A10
A11
A12
A13
A12
A13
A14
A15
36
35
34
33
A14
A15
A16
A17
A16 32
BY TE
VSS
Q15A-1
Q7
31
30
29
28
A0
Q7
Q14
Q6
Q13
Q5
27
26
25
24
Q6
Q5
Q12
Q4
VCC
23
22
Q4
M27C160
VDD
C89
0.1uF
A16
A15
A14
A13
A12
A11
A9
A8
WE
A18
A7
A6
A5
A4
A3
A2
A1
VDD
A11
A9
A8
A13
WE
A17
A15
A18
A16
A14
A12
A7
A6
A5
A4
VDD
Intel NOR FLASH
1
2
A16
3
4
5
6
7
A15
A14
A13
A12
A11
8
9
10
11
A9
A8
WE
RP
12
13
14
15
VPP
WP
A18
A7
16 A6
17
18
19
A5
A4
A3
20 A2
A1
28F320-TSOP
A17
GND
A20
A19
A10
DQ7
DQ6
DQ5
DQ4
VCCQ
VCC
NC
DQ3
DQ2
DQ1
DQ0
OE
GND
CE
A0
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A17
A20
A19
A10
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
OE
CE
A0
512KB x 8 SRAM
1
2
3
A11
A9
4 A8
5
6
7
8
A13
WE
A17
A15
9 VCC
10
11
12
A18
A16
A14
13 A12
14
15
16
A7
A6
A5
A4
LP62S4096-TSOP
OE
A10
CS1
IO7
IO6
IO5
IO4
IO3
GND
IO2
IO1
IO0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS3
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A0
A1
A2
A3
7. External RAM/Flash Memory
The external memory devices can be mask ROM, static RAM, or NOR type FLASH memory. Most NOR
type FLASH memory and RAM can be used as external storage for both program and data, so program
can be downloaded to external memory devices for future execution. However, there are some limitations.
When the data is to be written to external devices, the loader must reside in internal program space. In
other words, the loader program must be in internal ROM. When download is completed, the program in
the external memory can be run.
The data written to external memory devices is through a command interface composed of AC, EXMC
and EXMD registers for setting up the memory addresses, switching memory buses, generating read/write
pulse, read/write memory contents, etc. When writing finishes, external memory can be switched back the
external address and data bus for CPU to fetch data and instructions.
Writing to address registers is through a common register AC. Writing to AC will write data to ACL, ACH,
and then ACP in cyclic order. The sequence will be reset by an access to EXMD register. Therefore, it is
advisable to make a dummy read to EXMD register before writing to AC, so that the first write will be
made to ACL.
June 29, 2005
11
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HE84760B.PDF ] | |
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