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PDF HE84G761B Data sheet ( Hoja de datos )

Número de pieza HE84G761B
Descripción 8-bit Micro-controller
Fabricantes King blillion Electronics　
Logotipo King blillion Electronics Logotipo



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No Preview Available ! HE84G761B Hoja de datos, Descripción, Manual

KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84G761B
www.DaHtaES8he0e0t04U4.cSoemries
- Table of Contents -
1. General Description ___________________________________________________________________3
2. Features _____________________________________________________________________________3
3. Functional Block Diagram ______________________________________________________________4
4. Pin Description _______________________________________________________________________4
5. Pad Location _________________________________________________________________________6
6. ROM Map Configurations_____________________________________________________________11
7. External RAM/Flash Memory__________________________________________________________14
8. LCD Display RAM Map ______________________________________________________________15
9. LCD driver configurations_____________________________________________________________16
9.1. 16 Gray Scale LCD Display RAM Map ________________________________________________17
9.2. 4 Gray Scale LCD Display RAM Map _________________________________________________23
9.3. Black and White LCD Display RAM Map______________________________________________26
10. LCD Power Supply_________________________________________________________________29
11. LCDC Control register _____________________________________________________________31
12. Oscillators ________________________________________________________________________32
13. General Purpose I/O _______________________________________________________________34
14. Timer1 ___________________________________________________________________________36
15. Timer2 ___________________________________________________________________________37
16. Time Base ________________________________________________________________________38
17. Watch Dog Timer __________________________________________________________________39
18. Voice Output ______________________________________________________________________40
19. Low Voltage Detection/Reset _________________________________________________________44
20. Infrared output____________________________________________________________________45
21. Universal Asynchronous Receiver/Transmitter__________________________________________47
21.1. Interface Registers _________________________________________________________________48
21.2. Baud Rate Configuration Register ____________________________________________________48
21.3. Interrupt & Identification Register ___________________________________________________49
April 25, 2005
1
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.

1 page




HE84G761B pdf
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84G761B
www.DaHtaES8he0e0t04U4.cSoemries
Pin Name
LCAP2B
LCAP2A
LCAP1A
LCAP1B
LCAP3A
LVREG
LGS1
LVAG
VDD_LCD(VDDA)
GND_LCD(VSSA)
OAC
OCCK
GND
OPO
OPIP
OPIN
DAO
VO
RSTP_N
FXO,
FXI
TSTP_P
SXO,
SXI
VX
VDD
PRT10[7..0]
PRTD[7..2]
PRTD[1]/SIN
PRTD[0]/SOUT
PRTC[7:0]
VDD_RAM
IRO
PWM
GND_PWM
CMSG[32..79]
Pin # I/O
Description
53 O Charge Pump Capacitor Pin.
54 O Charge Pump Capacitor Pin.
55 O Charge Pump Capacitor Pin.
56 O Charge Pump Capacitor Pin.
57 O Charge Pump Capacitor Pin.
58
O
Voltage Regulator Output. VDD is regulated to generate LVREG, which is in turns
pumped to LVP. Adjust resistor between LGS1 and LVREG to set LVREG voltage.
59 I Regulator Voltage Setting
60 O Reference Voltage Output. Fixed 0.9 Volt DC reference voltage
61 P Power supply for LCD charge-pump.
62 P LCD power system ground.
63 O LCD frame signal for interfacing with LCD segment extender KD80.
64 O LCD data load pin for interfacing with LCD segment extender KD80.
65 P Power ground Input.
66 O Output of OP Amp.
67 I Non-inverting input of OP Amp.
68 I Inverting input of OP Amp.
69 O Alternate output of DAC.
70 O DAC Output.
71
I
System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for
72, O, RC type and ‘1’ for crystal type). For RC type oscillator, one resistor needs to be
73 B connected between FXI and GND. For crystal oscillator, one crystal needs to be placed
between FXI and FXO. Please refer to application circuit for details.
74
I
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But
for improving ESD, please connect this point with zero Ohm resistor to GND.
External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
75, O, Time-Base and other internal blocks. Both crystal and RC oscillator are provided. The
76 I slow clock type can be selected by mask option MO_SXTAL. Choose ‘0’ for RC type
and ‘1’ for crystal oscillator.
77
I
Input pin for x32 PLL circuit. Connect to external resistor and capacitors as shown in
application circuit.
78
P
Positive power Input. A 0.1 µF decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.
8-bit bi-directional I/O port 10. The output type of I/O pad can also be selected by mask
79~86
B
option MO_10PP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
pad as input pad, “1” must be outputted before reading.
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask
option MO_DPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
87~94
B
as input, ‘1’ must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.
PRTD[1] shares pad with UART Receiver SIN pin.
PRTD[0] shares pad with UART transmitter SOUT pin.
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask
95~102
B
option MO_CPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, ‘1’ must be outputted before reading the pin.
103 P Dedicated power input for RAM
104 O The Infrared output.
105
O
The PWM output can drive speaker or buzzer directly. Using VDD & PWM to drive
output device.
106 P Dedicated Ground for PWM output.
107~154
O
COM[32..79] pads are shared with SEG[95..48] outputs. The functions of the pads to be
COM drivers or SEG drivers can be selected by mask option MO_COM[1..0]. Please
April 25, 2005
5
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.

5 Page





HE84G761B arduino
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84G761B
www.DaHtaES8he0e0t04U4.cSoemries
159 SEG[43] X= -931.60 Y= 1354.05
160 SEG[42] X= -1031.60 Y= 1354.05
161 SEG[41] X= -1131.60 Y= 1354.05
162 SEG[40] X= -1231.60 Y= 1354.05
163 SEG[39] X= -1331.60 Y= 1354.05
164 SEG[38] X= -1431.60 Y= 1354.05
165 SEG[37] X= -1531.60 Y= 1354.05
166 SEG[36] X= -1631.60 Y= 1354.05
167 SEG[35] X= -1731.60 Y= 1354.05
168 SEG[34] X= -1831.60 Y= 1354.05
169 SEG[33] X= -1931.60 Y= 1354.05
170 SEG[32] X= -2031.60 Y= 1354.05
171 SEG[31] X= -2231.60 Y= 1354.05
172 SEG[30] X= -2331.60 Y= 1354.05
173 SEG[29] X= -2431.60 Y= 1354.05
174 SEG[28] X= -2531.60 Y= 1354.05
175 SEG[27] X= -2631.60 Y= 1354.05
176 SEG[26] X= -2731.60 Y= 1354.05
177 SEG[25] X= -2831.60 Y= 1354.05
178 SEG[24] X= -2931.60 Y= 1354.05
179 SEG[23] X= -3031.60 Y= 1354.05
180 SEG[22] X= -3131.60 Y= 1354.05
181 SEG[21] X= -3231.60 Y= 1354.05
182 SEG[20] X= -3331.60 Y= 1354.05
183 SEG[19] X= -3431.60 Y= 1354.05
184 SEG[18] X= -3531.60 Y= 1354.05
185 SEG[17] X= -3631.60 Y= 1354.05
186 SEG[16] X= -3731.60 Y= 1354.05
187 SEG[15] X= -3831.60 Y= 1354.05
188 SEG[14] X= -3931.60 Y= 1354.05
6. ROM Map Configurations
The chip has built-in 384K bytes internal ROM. In addition, address and data buses are provided to access
External ROM. The MCU can access up to 4M bytes program ROM and up to 16M bytes data space
through external buses. The SEG[47..40], SEG[39..16] pads are used as either data and address buses for
external ROM or LCD segment driver pads depending on the mask option MO_EXMEM. When the
external ROM mask option is selected, the MCU will retrieve the instructions and data from external
April 25, 2005
11
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.

11 Page







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