HMT125U6AFP8C PDF даташит
Спецификация HMT125U6AFP8C изготовлена «Hynix Semiconductor» и имеет функцию, называемую «240pin DDR3 SDRAM Unbuffered DIMMs». |
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Детали детали
Номер произв | HMT125U6AFP8C |
Описание | 240pin DDR3 SDRAM Unbuffered DIMMs |
Производители | Hynix Semiconductor |
логотип |
30 Pages
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240pin DDR3 SDRAM Unbuffered DIMMs
DDR3 SDRAM Unbuffered DIMMs
Based on 1Gb A version
HMT164U6AFP(R)6C
HMT112U6AFP(R)8C
HMT112U7AFP(R)8C
HMT125U6AFP(R)8C
HMT125U7AFP(R)8C
** Contents are subject to change without prior notice.
Rev. 0.1 / Dec 2008
1
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Revision History
Revision No.
0.01
0.02
0.1
History
Initial draft for internal review
Added IDD & Halogen-free products
Initial Specification Release.
Corrected typo on package ball feature.
HMT1w6w4wU.D6aAtaFShPe(eRt4)U6.cCom
HMT112U6(7)AFP(R)8C
HMT125U6(7)AFP(R)8C
Draft Date
Nov. 2007
Mar. 2008
Dec 2008
Remark
Preliminary
Preliminary
Rev. 0.1 / Dec 2008
2
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Table of Contents
1. Description
1.1 Device Features and Ordering Information
1.1.1 Features
1.1.2 Ordering Information
1.2 Speed Grade & Key Parameters
1.3 Address Table
2. Pin Architecture
2.1 Pin Definition
2.2 Input/Output Functional Description
2.3 Pin Assignment
3. Functional Block Diagram
3.1 512MB, 64Mx64 Module(1Rank of x16)
3.2 1GB, 128Mx64 Module(1Rank of x8)
3.3 1GB, 128Mx72 ECC Module(1Rank of x8)
3.4 2GB, 256Mx64 Module(2Rank of x8)
3.5 2GB, 256Mx72 ECC Module(2Rank of x8)
4. Address Mirroring Feature
4.1 DRAM Pin Wiring for Mirroring
5. Absolute Maximum Ratings
5.1 Absolute Maximum DC Ratings
5.2 Operating Temperature Range
6. AC & DC Operating Conditions
6.1 Recommended DC Operating Conditions
6.2 DC & AC Logic Input Levels
6.2.1 For Single-ended Signals
6.2.2 For Differential Signals
6.2.3 Differential Input Cross Point
6.3 Slew Rate Definition
6.3.1 For Ended Input Signals
6.3.2 For Differential Input Signals
6.4 DC & AC Output Buffer Levels
6.4.1 Single Ended DC & AC Output Levels
6.4.2 Differential DC & AC Output Levels
6.4.3 Single Ended Output Slew Rate
6.4.4 Differential Ended Output Slew Rate
6.5 Overshoot/Undershoot Specification
6.6 Input/Output Capacitance & AC Parametrics
6.7 IDD Specifications & Measurement Conditions
7. Electrical Characteristics and AC Timing
7.1 Refresh Parameters by Device Density
7.2 DDR3 Standard speed bins and AC para
8. DIMM Outline Diagram
8.1 512MB, 64Mx64 Module(1Rankx16)
8.2 1GB, 128Mx64 Module(1Rank of x8)
8.3 1GB, 128Mx72 ECC Module(1Rank of x8)
8.4 2GB, 256Mx64 Module(2Rank of x8)
8.5 2GB, 256Mx72 ECC Module(2Rank of x8)
Rev. 0.1 / Dec 2008
HMT1w6w4wU.D6aAtaFShPe(eRt4)U6.cCom
HMT112U6(7)AFP(R)8C
HMT125U6(7)AFP(R)8C
3
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Номер в каталоге | Описание | Производители |
HMT125U6AFP8C | 240pin DDR3 SDRAM Unbuffered DIMMs | Hynix Semiconductor |
HMT125U6AFP8C | 240pin DDR3 SDRAM Unbuffered DIMMs | Hynix Semiconductor |
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