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Número de pieza | NCP372 | |
Descripción | Positive and Negative Overvoltage Protection Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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Positive and Negative
Overvoltage Protection
Controller with Internal
Low Ron NMOS FETs and
Status FLAG
The NCP372 is able to disconnect systems from its output pin
when wrong operating conditions are detected at it’s input. The
system is both positive and negative overvoltage protected up to
±28 V.
This device uses internal NMOS, and therefore, no external device
is necessary, reducing the system cost and the PCB area of the
application board.
The NCP372 is able to instantaneously disconnect the output from
the input, due to integrated Low Ron Power NMOS, if the input
voltage exceeds the overvoltage threshold (OVLO) or undervoltage
threshold (UVLO).
At powerup (EN pin = low level), the Vout turns on 30 ms after the
Vin exceeds the undervoltage threshold.
The NCP372 provides a negative going flag (FLAG) output, which
alerts the system that a fault has occurred.
In addition, the device has ESD−protected input (15 kV Air) when
bypassed with a 1.0 mF or larger capacitor.
Features
• Overvoltage Protection up to 28 V
• Negative Voltage Protection down to −28 V
• Reverse Current Blocking
• On−Chip Low RDS(on) NMOS Transistor: Typical 130 mW
• Overvoltage Lockout (OVLO)
• Undervoltage Lockout (UVLO)
• Soft−Start
• Alert FLAG Output
• Shutdown EN Input
• Compliance to IEC61000−4−2 (Level 4)
8.0 kV (Contact)
15 kV (Air)
• ESD Ratings: Machine Model = B
Human Body Model = 2
• 12 Lead LLGA 3x3 mm Package
• This is a Pb−Free and Halogen−Free Device
Applications
• Cell Phones
• Camera Phones
• Digital Still Cameras
• Personal Digital Assistant
• MP3 Players
• GPS
© Semiconductor Components Industries, LLC, 2009
April, 2009 − Rev. 0
1
http://onsemi.com
MARKING
DIAGRAM
1
12 PIN LLGA
MU SUFFIX
CASE 513AK
NCAI
372
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
IN 1
12 OUT
IN 2
11 OUT
GND 3
RES 4
NCP372
10 FLAG
9 EN
RES 5
8 NC
RES 6
(Top View)
7 GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Publication Order Number:
NCP372/D
1 page Vin
Vout
FLAG
NCP372
TIMING DIAGRAMS
www.DataSheet4U.com
UVLO
ton
0.3 V
tstart
<OVLO
Vin − (RDS(on) I)
1.2 V
OVLO
Vin
Vout
Vin − (RDS(on)
I)
toff
0.3 V
FLAG
tstop
0.4 V
Figure 3. Startup
Figure 4. Shutdown on Overvoltage Detection
EN
Vout
Vin − (RDS(on)
I)
1.2 V
tdis
FLAG
0.3 V
Figure 5. Disable on EN = 1
EN
Vin
FLAG
1.2 V
OVLO
UVLO
ton + tstart
Figure 6. FLAG Response with EN = 1
http://onsemi.com
5
5 Page NCP372
RDS(on) and Dropout
The NCP372 includes two internal low RDS(on)
N−MOSFETs to protect the system, connected on OUT pin,
from overvoltage, negative voltage and reverse current
protection. During normal operation, the RDS(on)
characteristics of the N−MOSFETs give rise to low losses
on Vout pin.
As example: Rload = 8 W, Vin= 5 V. RwDwSw(o.Dn)a=ta1S5h5eemt4WU..cIooumt
= 800 mA.
Vout = 4.905 V
NMOS Losses = RDS(on) x Iout2 = 0.155 x 0.82 = 0.0992 W
ORDERING INFORMATION
Device
Marking
Package
Shipping†
NCP372MUAITXG
NCAI
372
LLGA12
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
SELECTION GUIDE
The NCP372 can be available in several undervoltage and overvoltage options. Part number is designated as follows:
NCP372MUxxTxG
Code
a
b
c
d
ab c d
Contents
UVLO Typical Threshold
a: A = 2.7 V
OVLO Typical Threshold
b: I = 6.3 V
Tape & Reel Type
c: X = 3000
d: G = Pb−Free
http://onsemi.com
11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet NCP372.PDF ] |
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