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PDF HMD16M32M8EH Data sheet ( Hoja de datos )
| Número de pieza | HMD16M32M8EH | |
| Descripción | 64Mbyte (16Mx32) 72-pin EDO Mode 4K Ref. SIMM Design 5V | |
| Fabricantes | Hanbit Electronics | |
| Logotipo |  |
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HANBit
HMD16M32M8EH
64Mbyte (16Mx32) 72-pin EDO Mode 4K Ref. SIMM Design 5V
Part No. HMD16M32M8EH
GENERAL DESCRIPTION
The HMD16M32M8EH is a 16M x 32bit dynamic RAM high-density memory module. The module consists of eight
CMOS 16M x 4bit DRAMs in 32-pin TSOPII packages mounted on a 72-pin, double-sided, FR-4-printed circuit board. A
0.1uF decoupling capacitor is mounted on the printed circuit board for each DRAM components. The module is a Single
In-line Memory Module with edge connections and is intended for mounting in to 72-pin edge connector sockets. All
module components may be powered from a single 5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
www.DataShwePeatr4tUId.ceonmtification
HMD16M32M8EH----4K Cycles/64ms Ref
w Access times : 50, 60ns
w High-density 64MByte design
w Single + 5V ±0.5V power supply
w JEDEC standard pinout
w EDO mode operation
w TTL compatible inputs and outputs
w FR4-PCB design
OPTIONS
w Timing
50ns access
60ns access
w Packages
72-pin SIMM
MARKING
-5
-6
M
PERFORMANCE RANGE
Speed
tRAC
tCAC
5
50ns
13ns
6
60ns
15ns
tRC
84ns
104ns
PRESENCE DETECT PINS
PIN ASSIGNMENT
PIN SYMBOL PIN SYMBOL PIN SYMBOL
1 Vss 25 DQ22 49 DQ8
2
DQ0
26
DQ7
50 DQ24
3 DQ16 27 DQ23 51
DQ9
4
DQ1
28
A7
52 DQ25
5 DQ17 29 A11 53 DQ10
6
DQ2
30
Vcc
54 DQ26
7 DQ18 31 A8 55 DQ11
8
DQ3
32
A9
56 DQ27
9 DQ19 33 NC 57 DQ12
10 Vcc 34 /RAS2 58 DQ28
11 NC 35 DQ26 59 Vcc
12 A0 36 NC 60 DQ29
13 A1 37 NC 61 DQ13
14 A2 38 NC 62 DQ30
15 A3 39 Vss 63 DQ14
16 A4 40 /CAS0 64 DQ31
17 A5 41 /CAS2 65 DQ15
18 A6 42 /CAS3 66 NC
19 A10 43 /CAS1 67
20 DQ4 44 /RAS0 68
PD1
PD2
21 DQ20 45 NC 69 PD3
22 DQ5 46 NC 70 PD4
23 DQ21 47 /WE 71 NC
24 DQ6 48 NC 72 Vss
Pin 50ns
PD1 Vss
PD2 NC
PD3 Vss
PD4 Vss
60ns
Vss
NC
NC
NC
72 PIN SIMM TOP VIEW
URL:www.hbe.co.kr
REV.1.0 (August.2002)
-1-
HANBit Electronics Co.,Ltd.
1 page  
HANBit
HMD16M32M8EH
/RAS hold time
tRSH
8
13 15
ns
/CAS hold time
tCSH
35
38
45
ns
/CAS pulse width
tCAS
7
5K 8
10K 10 10K ns
/RAS to /CAS delay time
tRCD
11
33 20
37 20
45 ns
/RAS to column address delay time
tRAD
9
22 15
25 15
30 ns
/CAS to /RAS precharge time
tCRP
5
5
5
ns
Row address set-up time
tASR
0
0
0
ns
Row address hold time
tRAH
7
10 10
ns
Column address set-up time
tASC
0
0
0
ns
Column address hold time
tCAH
7
8
10
www.DataSheCeot4luUm.cnoamddress hold referenced to /RAS
tAR 50
50
55
ns
ns
Column Address to /RAS lead time
tRAL 23
25
30
ns
Read command set-up time
tRCS
0
0
0
ns
Read command hold referenced to /CAS
tRCH
0
0
0
ns
Read command hold referenced to /RAS
tRRH
0
0
0
ns
Write command hold time
tWCH
7
10 10
ns
Write command hold referenced to /RAS
tWCR
50
50
55
ns
Write command pulse width
tWP 6
10 10
ns
Write command to /RAS lead time
tRWL
8
13 10
ns
Write command to /CAS lead time
tCWL
7
8
10
ns
Data-in set-up time
tDS 0 0 0
ns
Data-in hold time
tDH 7 8 10
ns
Data-in hold referenced to /RAS
tDHR
50
50
55
ns
Refresh period
tREF 64 64 64 ns
Write command set-up time
tWCS
0
0
0
ns
/CAS setup time (C-B-R refresh)
tCSR
5
5
5
ns
/CAS hold time (C-B-R refresh)
tCHR
10
10
10
ns
/RAS precharge to /CAS hold time
tRPC
5
5
5
ns
Access time from /CAS precharge
tCPA
24 28 35 ns
Fast page mode cycle time
tPC 40 40 45
ns
/CAS precharge time (Fast page)
tCP 6.5
8
10
ns
/RAS pulse width (Fast page )
tRASP
45
200K 50
200K 60
200K
ns
/W to /RAS precharge time(C-B-R refresh)
tWRP
10
10
10
ns
/W to /RAS hold time (C-B-R refresh)
tWRH
10
10
10
ns
/CAS precharge(C-B-R counter test)
tCPT 20
20
30
ns
NOTES
1.An initial pause of 200µs is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
URL:www.hbe.co.kr
REV.1.0 (August.2002)
-5-
HANBit Electronics Co.,Ltd.
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HMD16M32M8EH.PDF ] | |
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