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PDF HMD16M32M8GH Data sheet ( Hoja de datos )

Número de pieza HMD16M32M8GH
Descripción 64Mbyte (16Mx36) FP Mode 4K Ref. 72pin-SIMM Design
Fabricantes Hanbit Electronics 
Logotipo Hanbit Electronics Logotipo



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HANBit
HMD16M32M8GH
64Mbyte (16Mx36) FP Mode 4K Ref. 72pin-SIMM Design
Part No. HMD16M32M8GH
GENERAL DESCRIPTION
The HMD16M32M8GH is a 16M x 32bit dynamic RAM high-density memory module. The module consists of eight
CMOS 16M x 4bit DRAMs in 32-pin SOJ or TSOP packages mounted on a 72-pin glass-epoxy substrate. A 0.1 or 0.22uF
decoupling capacitor is mounted on the printed circuit board for each DRAM components. The module is a Single In-line
Memory Module with edge connections and is intended for mounting in to 72-pin edge connector sockets. All module
components may be powered from a single 5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
www.DataShwePeatr4tUId.ceonmtification
HMD16M32M8GH
---4K Cycles/64ms Ref, Gold
w Access times : 50, 60ns
w High-density 64MByte design
w Single + 5V ±0.5V power supply
w JEDEC standard Pdpin & pinout
w TTL compatible inputs and outputs
w/CAS-before-/RAS & Hidden
capability
w/RAS-only refresh capability
wFast Page Mode Operation
Refresh
OPTIONS
w Timing
50ns access
60ns access
w Packages
72-pin SIMM
MARKING
-5
-6
M
PERFORMANCE RANGE
PIN ASSIGNMENT
PIN SYMBOL
PIN SYMBOL
PI
N
SYMBOL
PI
N
1 Vss 19 A10 37 NC 55
2 DQ0 20 DQ4 38 NC 56
3 DQ18 21 DQ22 39 Vss 57
4 DQ1 22 DQ5 40 /CAS0 58
5 DQ19 23 DQ23 41 /CAS2 59
6 DQ2 24 DQ6 42 /CAS3 60
7 DQ20 25 DQ24 43 /CAS1 61
8 DQ3 26 DQ7 44 /RAS0 62
9 DQ21 27 DQ25 45 NC 63
10 Vcc 28 A7 46 NC 64
11 NC 29 A11 47 /W 65
12 A0 30 Vcc 48 NC 66
13 A1 31 A8 49 DQ9 67
14 A2 32 A9 50 DQ27 68
15 A3 33 NC 51 DQ10 69
16 A4 34 /RAS2 52 DQ28 70
17 A5 35 NC 53 DQ11 71
18 A6 36 NC 54 DQ29 72
SYMBO
L
DQ12
DQ30
DQ13
DQ31
Vcc
DQ32
DQ14
DQ33
DQ15
DQ34
DQ16
NC
PD1
PD2
PD3
PD4
NC
Vss
Speed
5
6
tRAC
50ns
60ns
tCAC
13ns
15ns
tRC
90ns
110ns
PRESENCE DETECT PINS
Pin
50ns
60ns
PD1 Vss Vss
PD2
NC
NC
PD3
Vss
NC
PD4
Vss
NC
URL:www.hbe.co.kr
REV.1.0 (August.2002)
1 HANBit Electronics Co.,Ltd.

1 page




HMD16M32M8GH pdf
HANBit
HMD16M32M8GH
/RAS to column address delay time
tRAD
15
25 15
30
ns
/CAS to /RAS precharge time
tCRP
5
5
ns
Row address set-up time
tASR
0
0
ns
Row address hold time
tRAH
10
10
ns
Column address set-up time
tASC
0
0
ns
Column address hold time
tCAH
8
10
ns
Column address hold referenced to /RAS
tAR 50
55
ns
Column Address to /RAS lead time
tRAL 25
30
ns
Read command set-up time
tRCS
0
0
ns
Read command hold referenced to /CAS
www.DataSheReet4aUd.ccoommmand hold referenced to /RAS
tRCH
tRRH
0
0
0
0
ns
ns
Write command hold time
tWCH
10
10
ns
Write command hold referenced to /RAS
tWCR
50
55
ns
Write command pulse width
tWP 10
10
ns
Write command to /RAS lead time
tRWL
13
10
ns
Write command to /CAS lead time
tCWL
8
10
ns
Data-in set-up time
tDS 0
0
ns
Data-in hold time
tDH 8
10
ns
Data-in hold referenced to /RAS
tDHR
50
55
ns
Refresh period
tREF 64 64
ns
Write command set-up time
tWCS
0
0
ns
/CAS setup time (C-B-R refresh)
tCSR
5
5
ns
/CAS hold time (C-B-R refresh)
tCHR
10
10
ns
/RAS precharge to /CAS hold time
tRPC
5
5
ns
Access time from /CAS precharge
tCPA
28 35
ns
Fast page mode cycle time
tPC 40
45
ns
/CAS precharge time (Fast page)
tCP 8
10
ns
/RAS pulse width (Fast page )
tRASP 50 200K 60 200K
ns
/W to /RAS precharge time(C-B-R refresh)
tWRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
tWRH
10
10
ns
/CAS precharge(C-B-R counter test)
tCPT
20
30
ns
NOTES
1.An initial pause of 200µs is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between
VIH(min) and VIL(max) and are assumed to be 5ns for all inputs.
3.Measured with a load equivalent to 2TTL loads and 100pF
4.Operation within the tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD
is greater than the specified tRCD(max) limit, then access time is controlled exclusively by tCAC.
URL:www.hbe.co.kr
REV.1.0 (August.2002)
5 HANBit Electronics Co.,Ltd.

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