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Número de pieza | NTD4806N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTD4806N
Power MOSFET
30 V, 76 A, Single N−Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices
Applications
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
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MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (RqJA) (Note 1)
Power Dissipation
(RqJA) (Note 1)
Continuous Drain
Current (RqJA) (Note 2)
Power Dissipation
(RqJA) (Note 2)
Continuous Drain
Current (RqJC)
(Note 1)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
VDSS
VGS
ID
PD
ID
PD
ID
30
"20
14
11
2.14
11
8.8
1.33
76
59
V
V
A
W
A
W
A
Power Dissipation
(RqJC) (Note 1)
TC = 25°C
Pulsed Drain Current tp=10ms TA = 25°C
Current Limited by Package
TA = 25°C
Operating Junction and Storage Temperature
PD
IDM
IDmaxPkg
TJ, Tstg
60
150
45
−55 to
175
W
A
A
°C
Source Current (Body Diode)
Drain to Source dV/dt
IS
dV/dt
50 A
6.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 30 V, VGS = 10 V,
L = 1.0 mH, IL(pk) = 21 A, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
EAS 220 mJ
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
30 V
RDS(on) MAX
6.0 mW @ 10 V
9.4 mW @ 4.5 V
D
ID MAX
76 A
N−Channel
G
S
4
4
4
12
3
CASE 369C
DPAK
(Bend Lead)
STYLE 2
1 23
1
2
3
CASE 369AC CASE 369D
3 IPAK
DPAK
(Straight Lead) (Straight Lead)
STYLE 2
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y = Year
WW = Work Week
4806N = Device Code
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 1
1
Publication Order Number:
NTD4806N/D
1 page NTD4806N
TYPICAL PERFORMANCE CURVES
4000
VDS = 0 V VGS = 0 V
3000 Ciss
TJ = 25°C
2000
Ciss
Crss
1000
Coss
0 Crss
10 5 0 5 10 15 20 25
www.DataSheet4U.com VGS
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
8
6
QT
Q1 Q2
4
VGS
2
ID = 30 A
VGS = 4.5 V
0 TJ = 25°C
0 5 10 15 20
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
1000
VDD = 15 V
ID = 30 A
VGS = 11.5 V
100 tr
td(off)
10 td(on)
tf
1
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
1000
100 10 ms
100 ms
10
1
0.1
0.1
VGS = 20 V
SINGLE PULSE
TC = 25°C
1 ms
10 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
250
ID = 21 A
200
150
100
50
0
25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet NTD4806N.PDF ] |
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