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PDF 74LVTH16374A Data sheet ( Hoja de datos )
| Número de pieza | 74LVTH16374A | |
| Descripción | 3.3V 16-bit edge-triggered D-type flip-flop | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74LVT16374A; 74LVTH16374Awww.DataSheet4U.com
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Rev. 07 — 22 March 2010
Product data sheet
1. General description
The 74LVT16374A; 74LVTH16374A are high performance BiCMOS products designed for
VCC operation at 3.3 V.
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (nCP), the nQn outputs of the flip-flop take on the logic
levels set up at the nDn inputs.
2. Features and benefits
16-bit edge-triggered flip-flop
3-state buffers
Output capability: +64 mA and −32 mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection:
JESD78B Class II exceeds 500 mA
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
1 page  
NXP Semiconductors
74LVT16374A; 74LVTH16374A
www.DataSheet4U.com
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
Pin
SOT370-1 and
SOT362-1
SOT702-1
1OE, 2OE 1, 24
A1, K1
1CP, 2CP 48, 25
A6, K6
1Q0 to 1Q7 2, 3, 5, 6, 8, 9, 11, 12
B2, B1, C2, C1, D2,
D1, E2, E1
2Q0 to 2Q7 13, 14, 16, 17, 19, 20, F1, F2, G1, G2, H1,
22, 23
H2, J1, J2
GND
4, 10, 15, 21, 28, 34, 39, B3, D3, G3, J3, J4,
45 G4, D4, B4
VCC
1D0 to 1D7
7, 18, 31, 42
47, 46, 44, 43, 41, 40,
38, 37
C3, H3, H4, C4
B5, B6, C5, C6, D5,
D6, E5, E6
2D0 to 2D7 36, 35, 33, 32, 30, 29, F6, F5, G6, G5, H6,
27, 26
H5, J6, J5
n.c. -
A2, A3, A4, A5,
K2, K3, K4, K5
SOT1134-1
Description
A30, A13
output enable input (active LOW)
A29, A14
clock input
B20, A31, D5, D1, A2, data output
B2, B3, A5
A6, B5, B6, A9, D2,
D6, A12, B8
data output
A32, A3, A8, A11, A16, ground (0 V)
A19, A24, A27
A1, A10, A17, A26 supply voltage
B18, A28, D8, D4,
A25, B16, B15, A22
data input
A21, B13, B12, A18, data input
D3, D7, A15, B10
A4, A7, A20, A23, B1, not connected
B4, B7, B9, B11, B14,
B17, B19
6. Functional description
Table 3. Function table[1]
Operating mode
Input
Internal register
nOE
nCP
nDn
Load and read register
L
↑
l
L
L↑hH
Hold
L NC X NC
Disable outputs H NC X NC
H ↑ nDn nDn
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW clock transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW clock transition;
NC = no change;
X = don’t care;
Z = high-impedance OFF-state;
↑ = LOW-to-HIGH clock transition.
Output
nQ0 to nQ7
L
H
NC
Z
Z
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
5 of 19
5 Page 
NXP Semiconductors
74LVT16374A; 74LVTH16374A
www.DataSheet4U.com
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
tW
tW
VM
tr
tf
VM
VCC
PULSE
GENERATOR
VI
DUT
VO
RT
VEXT
RL
CL RL
001aae235
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 10. Test circuit for measuring switching times
Table 9.
Input
VI
2.7 V
Test data
fi
≤ 10 MHz
tW
500 ns
tr, tf
≤ 2.5 ns
Load
CL
50 pF
RL
500 Ω
VEXT
tPHZ, tPZH
GND
tPLZ, tPZL
6V
tPLH, tPHL
open
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
11 of 19
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| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet 74LVTH16374A.PDF ] | |
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