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74HC2GU04 PDF даташит

Спецификация 74HC2GU04 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Dual unbuffered inverter».

Детали детали

Номер произв 74HC2GU04
Описание Dual unbuffered inverter
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74HC2GU04 Даташит, Описание, Даташиты
74HC2GU04
Dual unbuffered inverter
Rev. 01 — 6 October 2006
www.DataSheet4U.com
Product data sheet
1. General description
The 74HC2GU04 is a high-speed Si-gate CMOS device.
The 74HC2GU04 provides two unbuffered inverters.
2. Features
I Wide supply voltage range from 2.0 V to 6.0 V
I Complies with JEDEC standard no. 7A
I High noise immunity
I ESD protection:
N HBM JESD22-A114-D exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Low power dissipation
I Balanced propagation delays
I Multiple package options
I Specified from 40 °C to +85 °C and 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC2GU04GW 40 °C to +125 °C SC-88
74HC2GU04GV 40 °C to +125 °C SC-74
4. Marking
Description
plastic surface-mounted package; 6 leads
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT363
SOT457
Table 2. Marking
Type number
74HC2GU04GW
74HC2GU04GV
Marking code
PD
HU4









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74HC2GU04 Даташит, Описание, Даташиты
NXP Semiconductors
5. Functional diagram
74HC2GU04
www.DataSheet4U.com
Dual unbuffered inverter
1 1A
1Y 6
1
1
6
3 2A
2Y 4
mnb079
Fig 1. Logic symbol
1
3
4
mnb080
Fig 2. IEC logic symbol
6. Pinning information
6.1 Pinning
74HC2GU04
Fig 4. Pin configuration
1A 1
GND 2
2A 3
6 1Y
5 VCC
4 2Y
001aaf305
6.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
VCC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
AY
mna045
Fig 3. Logic diagram (one gate)
74HC2GU04_1
Product data sheet
Rev. 01 — 6 October 2006
© NXP B.V. 2006. All rights reserved.
2 of 15









No Preview Available !

74HC2GU04 Даташит, Описание, Даташиты
NXP Semiconductors
74HC2GU04
www.DataSheet4U.com
Dual unbuffered inverter
7. Functional description
Table 4.
Input
nA
L
H
Function table[1]
[1] H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Output
nY
H
L
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to VCC + 0.5 V
0.5
[1] -
[1] -
[1] -
[1] -
[1] -
65
[2] -
+7.0
±20
±20
±25
+50
50
+150
250
V
mA
mA
mA
mA
mA
°C
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
VCC
VI
VO
Tamb
tr
tf
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
output voltage
ambient temperature
rise time
except for Schmitt trigger inputs
fall time
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
except for Schmitt trigger inputs
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min Typ Max Unit
2.0 5.0 6.0 V
0-
VCC V
0-
VCC V
40 +25 +125 °C
- - 1000 ns
- - 500 ns
- - 400 ns
- - 1000 ns
- - 500 ns
- - 400 ns
74HC2GU04_1
Product data sheet
Rev. 01 — 6 October 2006
© NXP B.V. 2006. All rights reserved.
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