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CDB4384 PDF даташит

Спецификация CDB4384 изготовлена ​​​​«Cirrus Logic» и имеет функцию, называемую «192 kHz 8-Channel D/A Converter».

Детали детали

Номер произв CDB4384
Описание 192 kHz 8-Channel D/A Converter
Производители Cirrus Logic
логотип Cirrus Logic логотип 

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CDB4384 Даташит, Описание, Даташиты
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CS4384
103 dB, 192 kHz 8-Channel D/A Converter
Features
 Advanced Multi-bit Delta Sigma Architecture
 24-bit Conversion
 Automatic Detection of Sample Rates up to
192 kHz
 103 dB Dynamic Range
 -88 dB THD+N
 Single-Ended Output Architecture
 Direct Stream Digital® (DSD™) Mode
– Non-Decimating Volume Control
– On-Chip 50 kHz Filter
– Matched PCM and DSD Analog Output
Levels
 Compatible with Industry-Standard Time
Division Multiplexed (TDM) Serial Interface
 Selectable Digital Filters
 Volume Control with 1/2-dB Step Size and Soft
Ramp
 Low Clock-Jitter Sensitivity
 +5 V Analog Supply, +2.5 V Digital Supply
 Separate 1.8 to 5 V Logic Supplies for the
Control and Serial Ports
Description
The CS4384 is a complete 8-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
half-dB step size volume control, ATAPI channel mix-
ing, selectable fast and slow digital interpolation filters
followed by an oversampled, multi-bit delta sigma mod-
ulator which includes mismatch shaping technology that
eliminates distortion due to capacitor mismatch. Follow-
ing this stage is a multi-element switched capacitor
stage and low-pass filter with single-ended analog
outputs.
The CS4384 also has a proprietary DSD processor
which allows for volume control and 50 kHz on-chip fil-
tering without an intermediate decimation stage. It also
offers an optional path for direct DSD conversion by di-
rectly using the multi-element switched capacitor array.
The CS4384 accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems including SACD players, A/V re-
ceivers, digital TV’s, mixing consoles, effects
processors, and sound cards.
This product is available in 48-pin LQFP package in
Commercial (-40°C to +85°C) temperature grade. See
“Ordering Information” on page 51 for complete details.
C ontrol Port Supply = 1.8 V to 5 V
Digital Supply = 2.5 V
A nalog Supply = 5 V
Hardware Mode or
I2C /SPI Softw are Mode
Control Data
Reset
Serial A udio Port
Supply = 1.8 V to 5 V
PC M Serial
A udio Input
TDM Serial
A udio Input
DSD A udio
In p u t
R e giste r/H a rdwa re
C onfiguration
Internal Voltage
R e fe re nce
V olume
8 C ontrols
D igita l
F ilters
Multi-bit ∆Σ
Modula tors
Switch-C ap
DAC and
Analog F ilters
E ight C hannels
of Single-E nded
8 Outputs
DSD Processor
-Volume control
-50 kHz filter
E xternal Mute
C ontrol
2
Mute Signals
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
MAY '08
DS620F1









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CDB4384 Даташит, Описание, Даташиты
CS4384www.DataSheet4U.com
TABLE OF CONTENTS
1. PIN DESCRIPTION................................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS .......................................................................................... 8
ABSOLUTE MAXIMUM RATINGS............................................................................................................... 8
DAC ANALOG CHARACTERISTICS........................................................................................................... 9
POWER AND THERMAL CHARACTERISTICS........................................................................................ 10
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 12
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE .................................................. 12
DIGITAL CHARACTERISTICS .................................................................................................................. 13
SWITCHING CHARACTERISTICS - PCM ................................................................................................ 14
SWITCHING CHARACTERISTICS - DSD................................................................................................. 15
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT.................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT................................................... 17
3. TYPICAL CONNECTION DIAGRAM ................................................................................................ 18
4. APPLICATIONS ................................................................................................................................... 20
4.1 Master Clock.................................................................................................................................. 20
4.2 Mode Select.................................................................................................................................. 21
4.3 Digital Interface Formats ............................................................................................................... 22
4.3.1 OLM #1 ................................................................................................................................ 23
4.3.2 OLM #2 ................................................................................................................................ 23
4.3.3 OLM #3 ................................................................................................................................ 24
4.3.4 OLM #4 ................................................................................................................................ 24
4.3.5 TDM ..................................................................................................................................... 24
4.4 Oversampling Modes..................................................................................................................... 25
4.5 Interpolation Filter .......................................................................................................................... 25
4.6 De-Emphasis ................................................................................................................................. 25
4.7 ATAPI Specification ....................................................................................................................... 26
4.8 Direct Stream Digital (DSD) Mode................................................................................................. 26
4.9 Grounding and Power Supply Arrangements ................................................................................ 27
4.9.1 Capacitor Placement............................................................................................................ 27
4.10 Analog Output and Filtering ......................................................................................................... 27
4.11 The MUTEC Outputs ................................................................................................................... 28
4.12 Recommended Power-Up Sequence .......................................................................................... 29
4.12.1 Hardware Mode.................................................................................................................. 29
4.12.2 Software Mode ................................................................................................................... 29
4.13 Recommended Procedure for Switching Operational Modes...................................................... 30
4.14 Control Port Interface .................................................................................................................. 30
4.14.1 MAP Auto Increment .......................................................................................................... 30
4.14.2 I²C Mode ............................................................................................................................ 30
4.14.3 SPI Mode ........................................................................................................................... 31
4.15 Memory Address Pointer (MAP) ................................................................................................. 32
4.15.1 INCR (Auto Map Increment Enable) .................................................................................. 32
4.15.2 MAP4-0 (Memory Address Pointer) ................................................................................... 32
5. REGISTER QUICK REFERENCE ....................................................................................................... 33
6. REGISTER DESCRIPTION .................................................................................................................. 35
6.1 Chip Revision (Address 01h) ......................................................................................................... 35
6.1.1 Part Number ID (PART) [Read Only] ................................................................................... 35
6.1.2 Revision ID (REV) [Read Only] ............................................................................................ 35
6.2 Mode Control 1 (Address 02h) ...................................................................................................... 35
6.2.1 Control Port Enable (CPEN) ................................................................................................ 35
6.2.2 Freeze Controls (FREEZE) .................................................................................................. 35
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6.2.3 PCM/DSD Selection (DSD/PCM)......................................................................................... 36
6.2.4 DAC Pair Disable (DACx_DIS) ............................................................................................ 36
6.2.5 Power Down (PDN).............................................................................................................. 36
6.3 PCM Control (Address 03h) .......................................................................................................... 36
6.3.1 Digital Interface Format (DIF)............................................................................................... 36
6.3.2 Functional Mode (FM) .......................................................................................................... 37
6.4 DSD Control (Address 04h) ........................................................................................................... 37
6.4.1 DSD Mode Digital Interface Format (DSD_DIF) .................................................................. 37
6.4.2 Direct DSD Conversion (DIR_DSD)..................................................................................... 38
6.4.3 Static DSD Detect (STATIC_DSD) ...................................................................................... 38
6.4.4 Invalid DSD Detect (INVALID_DSD).................................................................................... 38
6.4.5 DSD Phase Modulation Mode Select (DSD_PM_MODE).................................................... 38
6.4.6 DSD Phase Modulation Mode Enable (DSD_PM_EN) ........................................................ 38
6.5 Filter Control (Address 05h) .......................................................................................................... 39
6.5.1 Interpolation Filter Select (FILT_SEL).................................................................................. 39
6.6 Invert Control (Address 06h) ......................................................................................................... 39
6.6.1 Invert Signal Polarity (INV_xx) ............................................................................................. 39
6.7 Group Control (Address 07h) ........................................................................................................ 39
6.7.1 Mutec Pin Control (MUTEC) ................................................................................................ 39
6.7.2 Channel A Volume = Channel B Volume (Px_A=B)............................................................. 39
6.7.3 Single Volume Control (SNGLVOL) ..................................................................................... 40
6.8 Ramp and Mute (Address 08h) ..................................................................................................... 40
6.8.1 Soft Ramp and Zero Cross Control (SZC) ........................................................................... 40
6.8.2 Soft Volume Ramp-Up After Error (RMP_UP) ..................................................................... 41
6.8.3 Soft Ramp-Down Before Filter Mode Change (RMP_DN) ................................................... 41
6.8.4 PCM Auto-Mute (PAMUTE) ................................................................................................. 41
6.8.5 DSD Auto-Mute (DAMUTE) ................................................................................................. 41
6.8.6 MUTE Polarity and DETECT (MUTEP1:0)........................................................................... 41
6.9 Mute Control (Address 09h) .......................................................................................................... 42
6.9.1 Mute (MUTE_xx) .................................................................................................................. 42
6.10 Mixing Control (Address 0Ah, 0Dh, 10h, 13h) ............................................................................. 42
6.10.1 De-Emphasis Control (PX_DEM1:0).................................................................................. 42
6.10.2 ATAPI Channel Mixing and Muting (ATAPI) ...................................................................... 43
6.11 Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h)........................................... 44
6.11.1 Digital Volume Control (xx_VOL7:0) .................................................................................. 44
6.12 PCM Clock Mode (Address 16h) ................................................................................................. 44
6.12.1 Master Clock Divide by 2 Enable (MCLKDIV).................................................................... 44
7. FILTER RESPONSE PLOTS ............................................................................................................... 45
8. REFERENCES...................................................................................................................................... 49
9. PARAMETER DEFINITIONS................................................................................................................ 49
10. PACKAGE DIMENSIONS .................................................................................................................. 50
11. ORDERING INFORMATION .............................................................................................................. 51
12. REVISION HISTORY ......................................................................................................................... 51
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