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S71JL064H80 PDF даташит

Спецификация S71JL064H80 изготовлена ​​​​«Advanced Micro Devices» и имеет функцию, называемую «Stacked Multi-chip Product (MCP) Flash Memory And Psram CMOS 3.0Volt-only».

Детали детали

Номер произв S71JL064H80
Описание Stacked Multi-chip Product (MCP) Flash Memory And Psram CMOS 3.0Volt-only
Производители Advanced Micro Devices
логотип Advanced Micro Devices логотип 

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S71JL064H80 Даташит, Описание, Даташиты
S71JL128HC0/128HB0/064HB0/
064HA0/064H80
Stacked Multi-Chip Product (MCP) Flash Memory
and pSRAM CMOS 3.0 Volt-only,
Simultaneous Operation Flash Memories and
Static RAM/Pseudo-static RAM
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PRELIMINARY
DISTINCTIVE CHARACTERISTICS
MCP Features
„ Operating Voltage Range of 2.7 to 3.3 V
„ High Performance
— Access time as fast as 55 ns
„ Packages
— 73-ball FBGA—8 x 11.6 mm
— 88-ball FBGA—8 x 11.6 mm
„ Operating Temperatures
— Wireless: –25°C to +85°C
— Industrial: –40°C to +85°C
GENERAL DESCRIPTION
The S71JLxxxH Series is a product line of stacked Multi-Chip
Products (MCP) and consists of
„ One or more S29JL064H Flash devices
„ SRAM or pSRAM options
— 8Mb x 8/x 16 SRAM
— 16Mb x 16-only SRAM
— pSRAM x 16 only:
8Mb pSRAM
16Mb pSRAM
32Mb pSRAM
64Mb pSRAM
The products covered by this document are listed below. For
details about their specifications, please refer to the individual
constituent data sheets for further details.
MCP
Number of S29JL064H
Total Flash Density
SRAM/pSRAM Density
S71JL064H80
1
64Mb
8Mb
S71JL064HA0
1
64Mb
16Mb
S71JL064HB0
1
64Mb
32Mb
S71JL128HB0
2
128Mb
32Mb
S71JL128HC0
2
128Mb
64Mb
Notes:
1. This MCP is only guaranteed to operate @ 2.7 - 3.3 V regardless of component operating ranges.
2. BYTE# operation is only supported on the S71JL064H80xx0x.
Publication Number S29JLxxxHxx_00 Revision A Amendment 2 Issue Date February 26, 2004









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S71JL064H80 Даташит, Описание, Даташиты
Product Selector Guide
Preliminary
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Device-Model #
SRAM/pSRAM Density
S71JL064H80Bxx01
8Mb
S71JL064H80Bxx02
8Mb
S71JL064H80Bxx10
8Mb
S71JL064H80Bxx11
8Mb
S71JL064H80Bxx12
8Mb
SRAM/pSRAM Type
SRAM - x8/x16
SRAM - x8/x16
pSRAM - x16
pSRAM - x16
pSRAM - x16
Supplier
Flash Access RAM Access
Time (ns) Time (ns) Packages
Supplier 1
70
70 FLB073
Supplier 1
85
85 FLB073
Supplier 2
55
55 FLJ073
Supplier 2
70
70 FLJ073
Supplier 2
85
85 FLJ073
S71JL064HA0Bxx01
S71JL064HA0Bxx02
S71JL064HA0Bxx10
S71JL064HA0Bxx11
S71JL064HA0Bxx12
S71JL064HA0Bxx62
16Mb
16Mb
16Mb
16Mb
16Mb
16Mb
SRAM - x16
SRAM - x16
pSRAM - x16
pSRAM - x16
pSRAM - x16
pSRAM - x16
Supplier 1
Supplier 1
Supplier 2
Supplier 2
Supplier 2
Supplier 4
70
85
55
70
85
70
70 FLB073
85 FLB073
55 FLJ073
70 FLJ073
85 FLJ073
70 FLJ073
S71JL128HB0Bxx01
S71JL128HB0Bxx02
32Mb
32Mb
pSRAM - x16
pSRAM - x16
Supplier 3
Supplier 3
70
85
70 FTA073
85 FTA073
S71JL128HC0Bxx01
S71JL128HC0Bxx02
64Mb
64Mb
pSRAM - x16
pSRAM - x16
Supplier 3
Supplier 3
70
85
70 FTA088
85 FTA088
2
S71JL128HC0/128HB0/064HB0/064HA0/064H80
S29JLxxxHxx_00A2 February 26, 2004









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S71JL064H80 Даташит, Описание, Даташиты
Advance Information
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TABLE OF CONTENTS
S71JL128HC0/128HB0/064HB0/064HA0/064H80
Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .2
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
MCP Block Diagram of S71JL064H80, Model Numbers 01/02 ................6
MCP Block Diagram of S71JL064H80, Model Numbers 10/11/12 ..............6
MCP Block Diagram of S71JL064HA0, Model Numbers 01/02 ................7
MCP Block Diagram of S71JL064HA0, Model Numbers 10/11/12/61 ........7
MCP Block Diagram of S71JL064HB0, Model Numbers 00/01/02 ..........8
MCP Block Diagram of S71JL128HB0, Model Numbers 00/01/02 ...........9
MCP Block Diagram of S71JL128HC0, Model Numbers 00/01/02 ........ 10
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 11
Connection Diagram of S71JL064H80, Model Numbers 01/02 .............. 11
Special Package Handling Instructions ...................................................... 12
Pin Description ................................................................................................ 12
Logic Symbol .....................................................................................................13
Connection Diagram of S71JL064H80, Model Numbers 10/11/12 ........... 14
Pin Description .................................................................................................15
Logic Symbol .....................................................................................................15
Connection Diagram of S71JL064HA0, Model Numbers 01/02 ............. 16
Pin Description .................................................................................................17
Logic Symbol .................................................................................................... 18
Connection Diagram of S71JL064HA0, Model Numbers 10/11/12/61 ..... 19
Pin Description ............................................................................................... 20
Logic Symbol ................................................................................................... 20
Connection Diagram of S71JL064HB0, Model Numbers 00/01/02 ....... 21
Pin Description ............................................................................................... 22
Logic Symbol ................................................................................................... 22
Connection Diagram of S71JL128HB0, Model Numbers 00/01/02 ........23
Pin Description ............................................................................................... 24
Logic Symbol ................................................................................................... 24
Connection Diagram of S71JL128HC0, Model Numbers 00/01/02 .......25
Special Package Handling Instructions ......................................................25
Pin Description ............................................................................................... 26
Logic Symbol ................................................................................................... 26
Look-ahead Connection Diagram ..................................................................27
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .29
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 33
FLB073 ....................................................................................................................33
FLJ073 ......................................................................................................................34
FTA073 ...................................................................................................................35
FTA088 ..................................................................................................................36
S29JL064H
General Description 38
Simultaneous Read/Write Operations with Zero Latency ....................38
S71JLxxxHxx_00 Features ................................................................................38
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .40
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .42
Table 1. S71JLxxxHxx_00 Device Bus Operations .................. 42
Word/Byte Configuration ................................................................................ 43
Requirements for Reading Array Data ........................................................ 43
Writing Commands/Command Sequences ................................................ 43
Accelerated Program Operation ...............................................................44
Autoselect Functions .....................................................................................44
Simultaneous Read/Write Operations with Zero Latency ...................44
Standby Mode ......................................................................................................44
Automatic Sleep Mode .....................................................................................44
RESET#: Hardware Reset Pin ......................................................................... 45
Output Disable Mode ....................................................................................... 45
Table 2. S29JL064H Sector Architecture ............................... 46
Table 3. Bank Address ........................................................ 49
Table 4. SecSi™ Sector Addresses ...................................... 49
Autoselect Mode ................................................................................................49
Sector/Sector Block Protection and Unprotection .................................50
Table 5. S71JLxxxHxx_00 Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................... 50
Write Protect (WP#) ........................................................................................ 51
Table 6. WP#/ACC Modes ................................................... 52
Temporary Sector Unprotect ........................................................................ 52
Figure 1. Temporary Sector Unprotect Operation ................... 52
Figure 2. In-System Sector Protect/Unprotect Algorithms ....... 53
SecSi™ (Secured Silicon) Sector Flash Memory Region .......................... 53
Factory Locked: SecSi Sector Programmed and Protected At the
Factory ............................................................................................................... 54
Customer Lockable: SecSi Sector NOT Programmed or Protected At
the Factory ....................................................................................................... 54
Figure 3. SecSi Sector Protect Verify .................................... 55
Hardware Data Protection ............................................................................. 55
Low VCC Write Inhibit ................................................................................ 55
Write Pulse “Glitch” Protection ............................................................... 55
Logical Inhibit ................................................................................................... 56
Power-Up Write Inhibit ............................................................................... 56
Common Flash Memory Interface (CFI) . . . . . . 56
Table 7. CFI Query Identification String ................................ 56
Table 8. System Interface String ......................................... 57
Table 9. Device Geometry Definition .................................... 57
Table 10. Primary Vendor-Specific Extended Query ................ 58
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 59
Reading Array Data ........................................................................................... 59
Reset Command ................................................................................................. 59
Autoselect Command Sequence ....................................................................60
Enter SecSi™ Sector/Exit SecSi Sector Command Sequence ................60
Byte/Word Program Command Sequence .................................................60
Unlock Bypass Command Sequence ......................................................... 61
Figure 4. Program Operation ............................................... 62
Chip Erase Command Sequence ................................................................... 62
Sector Erase Command Sequence ................................................................ 63
Figure 5. Erase Operation ................................................... 64
Erase Suspend/Erase Resume Commands ..................................................64
Table 11. S29JL064H Command Definitions .......................... 65
Write Operation Status . . . . . . . . . . . . . . . . . . . . 66
DQ7: Data# Polling ............................................................................................ 66
Figure 6. Data# Polling Algorithm ........................................ 68
RY/BY#: Ready/Busy# .......................................................................................68
DQ6: Toggle Bit I ...............................................................................................69
Figure 7. Toggle Bit Algorithm ............................................. 70
DQ2: Toggle Bit II ..............................................................................................70
Reading Toggle Bits DQ6/DQ2 ...................................................................... 71
DQ5: Exceeded Timing Limits ......................................................................... 71
February 24, 2004 S71JLxxxHxx_00A0
3










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Номер в каталогеОписаниеПроизводители
S71JL064H80Stacked Multi-chip Product (MCP) Flash Memory And Psram CMOS 3.0Volt-onlyAdvanced Micro Devices
Advanced Micro Devices

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