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PDF ZXLD1370 Data sheet ( Hoja de datos )
| Número de pieza | ZXLD1370 | |
| Descripción | 60V HIGH ACCURACY BUCK/BOOST/BUCK-BOOST LED DRIVER CONTROLLER | |
| Fabricantes | Diodes | |
| Logotipo |  |
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A Product Line of
Diodes Incorporated www.DataSheet4U.com
ZXLD1370
60V HIGH ACCURACY BUCK/BOOST/BUCK-BOOST LED DRIVER CONTROLLER
Description
The ZXLD1370 is an LED driver controller IC for driving
external MOSFETs to drive high current LEDs. It is a multi-
topology controller enabling it to efficiently control the current
through series connected LEDs. The multi-topology enables
it to operate in buck, boost and buck-boost configurations.
The 60V capability coupled with its multi-topology capability
enables it to be used in a wide range of applications and
drive in excess of 15 LEDs in series.
The ZXLD1370 is a modified hysteretic controller using a
patent pending control scheme providing high output current
accuracy in all three modes of operation. High accuracy
dimming is achieved through DC control and high frequency
PWM control.
The ZXLD1370 uses two pins for fault diagnosis. A flag
output highlights a fault, while the multi-level status pin gives
further information on the exact fault.
Pin Assignments
TSSOP-16 EP
Features
• 0.5% typical output current accuracy
• 6 to 60V operating voltage range
• LED driver supports Buck, Boost and Buck-boost
• configurations
• Wide dynamic range dimming
o 20:1 DC dimming
o 1000:1 dimming range at 500Hz
• Up to 1MHz switching
• High temperature control of LED current using TADJ
Typical Application Circuit
Buck-boost diagram utilizing thermistor and Tadj
Curve showing LED current vs. TLED
ZXLD1370
Document number: DS32165 Rev. 2 - 2
1 of 33
www.diodes.com
May 2010
© Diodes Incorporated
1 page  
A Product Line of
Diodes Incorporated www.DataSheet4U.com
ZXLD1370
Electrical Characteristics (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)
Symbol
Output Parameters
Parameter
Conditions
Min Typ Max Units
VFLAGL FLAG pin low level output voltage
IFLAGOFF FLAG pin open-drain leakage current
Output sinking 1mA
VFLAG=40V
Normal operation
0.5 V
1 µA
4.2 4.5 4.8
Out of regulation (VSHP out of range) 3.3 3.6 3.9
(Note 6)
VSTATUS
STATUS Flag no-load output voltage
(Note 5)
VIN under-voltage (VIN < 5.6V)
Switch stalled (tON or tOFF> 100µs)
3.3
3.3
3.6
3.6
3.9
3.9
V
Over-temperature (TJ > 125°C)
1.5 1.8 2.1
Excess sense resistor current
(VSENSE > 0.32V)
0.6 0.9 1.2
RSTATUS Output impedance of STATUS output Normal operation
10 kΩ
Driver output (PIN GATE)
VGATEH High level output voltage
No load Sourcing 1mA
(Note 7)
10 11
V
VGATEL Low level output voltage
Sinking 1mA, (Note 8)
0.5 V
VGATECL High level GATE CLAMP voltage
VIN = VAU X= VISM = 18V
IGATE = 1mA
IGATE
Charging or discharging gate of
Dynamic peak current available during
rise or fall of output voltage
external switch with QG = 10nC and
400kHz
Time to assert ‘STALL’ flag and
tSTALL warning on STATUS output
(Note 9)
GATE low or high
LED Thermal control circuit (TADJ) parameters
VTADJH Upper threshold voltage
Onset of output current reduction
(VTADJ falling)
VTADJL Lower threshold voltage
Output current reduced to <10% of
set value (VTADJ falling)
ITADJ
TADJ pin Input current
VTADJ = 1.25V
12.8 15
±300
100 170
560 625 690
380 440 500
1
V
mA
µs
mV
mV
µA
Notes:
5. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence. E.g. ‘Excessive coil current’ and
‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin. The voltage levels on the STATUS output assume the
Internal regulator to be in regulation and VADJ<=VREF. A reduction of the voltage on the STATUS pin will occur when the voltage on VIN is near the
minimum value of 6V.
6. Flag is asserted if VSHP<2.5V or VSHP>3.5V
7. GATE is switched to the supply voltage VAUX for low values of VAUX (i.e. between 6V and approximately 12V). For VAUX>12V, GATE is clamped
internally to prevent it exceeding 15V.
8. GATE is switched to PGND by an NMOS transistor
9. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will remain
off until normal operation is possible.
ZXLD1370
Document number: DS32165 Rev. 2 - 2
5 of 33
www.diodes.com
May 2010
© Diodes Incorporated
5 Page 
A Product Line of
Diodes Incorporated www.DataSheet4U.com
ZXLD1370
b) Boost and Buck-Boost modes
Control in Boost and Buck-boost mode is achieved by
sensing the coil current in the series resistor Rs, connected
between the two inputs of a current monitor within the
control loop block. An output from the control loop drives
the input of a comparator which drives the gate of the
external NMOS switch transistor M1 via the internal Gate
Driver. In boost and buck-boost modes, when the switch is
on, current flows from VIN, via Rs, coil and switch to
ground. This current ramps up until an upper threshold
value is reached. At this point GATE goes low, the switch
is turned off and the current flows via Rs, coil, D1 and LED
back to VIN (Buck-boost mode), or GND (Boost mode).
When the coil current has ramped down to a lower
threshold value, GATE goes high, the switch is turned on
again and the cycle of events repeats, resulting in
continuous oscillation. The average current in the coil is
equal to the average of the maximum and minimum
threshold currents and the ripple current (hysteresis) is
equal to the difference between the thresholds.
Figure 15: Boost and Buck-Boost configuration
The average current in the LED is always less than the average current in the coil and the ratio between these currents is
set by the values of external resistors RGI1 and RGI2. The peak LED current is equal to the peak coil current. The control
loop maintains the average LED current at the set level by adjusting the thresholds and the hysteresis continuously to force
the average current in the coil to the value demanded by the voltage on the ADJ and GI pins. This minimises variation in
output current with changes in operating conditions. Loop compensation is achieved by a single external capacitor C2,
connected between SHP and SGND.
Gate Voltage
~15V
0V
VVIN
VVIN -225mV
ISM Voltage
Coil current
225mV/Rs
0A
LED current
225mV/Rs
Average
LED current
0A
tOFF
tON
Figure 16 - Operating waveforms (Boost and Buck-boost modes)
Note: In Boost and Buck-boost modes, average ILED= average ICOIL x RGI1/(RGI1+RGI2)
For more detailed descriptions of device operation and for choosing external components, please refer to the application
circuits and descriptions in the later sections of this specification.
ZXLD1370
Document number: DS32165 Rev. 2 - 2
11 of 33
www.diodes.com
May 2010
© Diodes Incorporated
11 Page | ||
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