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PDF CDB4354 Data sheet ( Hoja de datos )

Número de pieza CDB4354
Descripción 5 V Stereo DAC
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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No Preview Available ! CDB4354 Hoja de datos, Descripción, Manual

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CS4354
5 V Stereo DAC with 2 VRMS Ground-centered Output
Features
Description
Advanced Multi-bit Delta-Sigma Modulator
101 dB A-wt Dynamic Range
-86 dB THD+N
Single-ended Ground Centered Analog
Architecture
– No DC-blocking Capacitors Required
– Integrated Inverting Charge Pump
– Filtered Line-level Outputs
– 2 VRMS Full-scale Output
Low-latency Digital Filtering
Supports Sample Rates up to 192 kHz
24-bit I²S Input
+5 V Analog Supply with Integrated Inverting
Charge Pump and Regulator for Core Logic,
and +1.8 V to +5 V Interface Power Supplies
50 mW Power Consumption
14-pin SOIC, Lead-free Assembly
The CS4354 is a complete stereo digital-to-analog sys-
tem including digital interpolation, third-order multi-bit
delta-sigma digital-to-analog conversion, digital de-em-
phasis, analog filtering, and on-chip 2 VRMS line-level
driver from a 5 V supply.
The advantages of this architecture include ideal differ-
ential linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and temper-
ature, high tolerance to clock jitter, and a minimal set of
external components.
The CS4354 is available in a 14-pin SOIC package in
Commercial (-40°C to +85°C) grade. The CDB4354
Customer Demonstration Board is also available for de-
vice evaluation and implementation suggestions.
Please see “Ordering Information” on page 23 for com-
plete details.
These features are ideal for cost-sensitive, 2-channel
audio systems including video game consoles, Blu-Ray
Disc® and DVD players, set-top boxes, digital TVs, and
DAB/DMB devices.
Interface Supply (VL)
+1.8V to +5V
Power-On
Reset
I²S Serial
Audio Input
PCM Serial
Audio Port
Auto Speed
Mode Detect
Interpolation
Filters + HPF
Analog Supply (VA)
+5 V
1.8V reg
Inverting
Charge
Pump
-VA
Multibit
Modulator
DAC
Ground-Centered,
2 Vrms Line Level
Outputs
Left Channel
Right Channel
Advance Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
JULY '10
DS895A2

1 page




CDB4354 pdf
2. CHARACTERISTICS AND SPECIFICATIONS
CS4354www.DataSheet4U.com
RECOMMENDED OPERATING CONDITIONS
GND = 0 V; all voltages with respect to ground.(Note 1)
Parameters
Symbol Min Typ Max Units
DC Power Supply
Ambient Operating Temperature (Power Applied)
Analog power
Interface power
-CSZ
VA
VL
TA
4.75 5.0 5.25
1.4 1.8, 3.3, 5.0 5.25
-40 - +85
V
V
°C
Notes: 1. Device functional operation is guaranteed within these limits. Functionality is not guaranteed or implied
outside of these limits. Operation outside of these limits may adversely affect device reliability.
ABSOLUTE MAXIMUM RATINGS
GND = 0 V; all voltages with respect to ground.
Parameters
DC Power Supply
Low Voltage Analog Power
Interface Power
Input Current, Any Pin Except Supplies
Digital Input Voltage (Note 2)
Digital Interface
Ambient Operating Temperature (Power Applied)
Storage Temperature
Symbol
VA
VL
Iin
VIN-L
TA
Tstg
Min
-0.3
-0.3
-
-0.3
-55
-65
Max
6.0
6.0
±10
VL+ 0.4
+125
+150
Units
V
V
mA
V
°C
°C
WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.
Notes: 2. The maximum over/under voltage is limited by the input current except on the power supply pin.
DS895A2
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CDB4354 arduino
CS4354www.DataSheet4U.com
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise specified): VA = 5 V, VL = 3.3 V; GND = 0 V; SDIN = 0; all voltages with respect
to ground.
Parameters
Symbol Min Typ Max Units
Power Supplies
Power Supply Current (Note 15)
Power Dissipation (All Supplies)
(Note 15)
Normal Operation (Note 16)
Power-Down (Note 17)
Normal Operation (Note 16)
Power-Down (Note 17)
IVA
IVL
IVA
IVL
- 10 13 mA
-
0.1 0.2
mA
- 0.5 -
mA
- 1 - A
- 50 65 mW
- 2.5 - mW
Power Supply Rejection Ratio (Note 18)
(1 kHz) PSRR
-
60
-
(60 Hz)
- 60 -
dB
dB
DC Output Voltages
Pin Voltage
FILT+ to GND
FLYP to FLYN
GND to -VFILT
- 3.5 -
- 4.9 -
- 4.7 -
V
V
V
Notes: 15. Power supply current increases with increasing sample rate and increasing MCLK frequency. Typical
values are based on Fs = 48 kHz and MCLK = 12.288 MHz. Maximum values are based on highest
sample rate and highest MCLK frequency; see Switching Specifications - Serial Audio Interface. Vari-
ance between speed modes is small.
16. During normal operation, SDIN = 997 Hz sine wave at 0 dBFS with load resistance RL = 3 k.
17. Power-down is defined as all clock and data lines held static low. All digital inputs have a weak pull-
down (approximately 50 k) which is only present during power on reset. Opposing this pull-down will
increase the power-down current.
18. Valid with the recommended capacitor values as shown in the typical connection diagram in Section 5.
2.1 Digital I/O Pin Characteristics
Input and output levels and associated power supply voltage are shown in Table 2. Logic levels should not
exceed the corresponding power supply voltage.
Pin Name
MCLK
LRCK
SCLK
SDIN
Power Supply
VL
VL
VL
VL
I/O
Input
Input
Input
Input
Driver
-
-
-
-
Receiver
1.8 V - 5 V
1.8 V - 5 V
1.8 V - 5 V
1.8 V - 5 V
Table 2. Digital I/O Pin Characteristics
DS895A2
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