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Número de pieza | AK4127 | |
Descripción | 192kHz / 24Bit High Performance Asynchronous SRC | |
Fabricantes | Asahi Kasei Microsystems | |
Logotipo | ||
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AK4127
192kHz / 24Bit High Performance Asynchronous SRC
GENERAL DESCRIPTION
The AK4127 is a stereo digital sample rate converter (SRC). The input sample rate ranges from 8kHz to
216kHz. The output sample rate is from 8kHz to 216kHz. The system can take very simple configuration
because the AK4127 has an internal PLL and does not need any master clock at slave mode. The
AK4127 is suitable for the application interfacing to different sample rates such as high-end Car Audio
and DVD recorder.
FEATURES
1. SRC
• Asynchronous Sample Rate Converter
• Input Sample Rate Range (fsi): 8kHz ∼ 216kHz
• Output Sample Rate (fso): 8kHz ∼ 216kHz
• Input to Output Sample Rate Ratio: 1/6 to 6
• THD+N: −130dB
• Dynamic Range: 140dB (A-weighted)
• I/F format: MSB justified, LSB justified, I2S compatible and TDM
• PLL for Internal Operation Clock
• Clock for Master mode: 128/192/256/384/512/768fsi, 128/256/384/512/768fso
• SRC Bypass mode (Master/Slave)
• Soft Mute Function
2. Power Supply
• AVDD, DVDD: 3.0 ∼ 3.6V (typ. 3.3V)
3. Ta = −40 ∼ 85°C
4. Package: 30pin VSOP
5. AK4124/5 Pin-compatible
IDIF2 IDIF1 IDIF0 AVDD AVSS DVDD DVSS ODIF1 ODIF0
IBICK
ILRCK
SDTI
PLL2
PLL1
PLL0
Serial
Audio
I/F
PLL
SRC
Serial
Audio
I/F
OBIT1
OBIT0
OLRCK
OBICK
SDTO
OMCLK
PDN
SMUTE
DITHER
MS0593-E-01
UNLOCK IMCLK
CMODE2 CMODE1 CMODE0
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PIN/FUNCTION
No. Pin Name
1 FILT
2 AVSS
3 PDN
4 SMUTE
5 DITHER
6 PLL2
7 ILRCK
8 IBICK
9 SDTI
10 IDIF0
11 IDIF1
12 IDIF2
13 PLL0
14 PLL1
15 UNLOCK
16 OBIT0
17 OBIT1
18 IMCLK
19 CMODE0
20 CMODE1
21 CMODE2
22 ODIF0
23 ODIF1
24 SDTO
25 OBICK
26 OLRCK
27 OMCLK
28 DVDD
29 DVSS
30 AVDD
I/O Function
O PLL Loop Filter Pin, Hi-Z when PDN pin = “L”.
- Analog Ground Pin
I
Power-Down Mode Pin
“H”: Power up, “L”: Power down reset and initializes the control register.
I
Soft Mute Pin
“H” : Soft Mute, “L” : Normal Operation
I
Dither Enable Pin
“H” : Dither ON, “L” : Dither OFF
I PLL Mode Select 2 Pin
I/O Input Channel Clock Pin, Output “L” when PDN = “L” and master mode.
I/O Audio Serial Data Clock Pin, Output “L” when PDN = “L” and master mode.
I Audio Serial Data Input Pin
I Audio Interface Format 0 Pin for Input PORT
I Audio Interface Format 1 Pin for Input PORT
I Audio Interface Format 2 Pin for Input PORT
I PLL Mode Select 0 Pin
I PLL Mode Select 1 Pin
O Unlock Status Pin, Output “H” when PDN = “L”
I Bit Length Select 0 Pin for Output Data
I Bit Length Select 1 Pin for Output Data
I Master Clock Input Pin for Input PORT
I Clock Mode Select 0 Pin
I Clock Mode Select 1 Pin
I Clock Mode Select 2 Pin
I Audio Interface Format 0 Pin for Output PORT
I Audio Interface Format 1 Pin for Output PORT
O Audio Serial Data Output Pin for Output PORT, Output “L” when PDN pin = “L”
I/O
Audio Serial Data Clock Pin for Output PORT
Output “L” when PDN = “L” and master mode.
I/O
Output Channel Clock Pin for Output PORT
Output “L” when PDN = “L” and master mode.
Master Clock/TDM Data Input Pin for Output PORT
I OMCLK: Master Clock Input Pin (except for PLL2/1/0 pin = “L/H/H”)
TDMIN: TDM Data Input Pin (PLL2/1/0 pin = “L/H/H”)
- Digital Power Supply Pin, 3.0 ∼ 3.6V
- Digital Ground Pin
- Analog Power Supply Pin, 3.0 ∼ 3.6V
Note: All input pins must not be left floating.
MS0593-E-01
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2007/07
5 Page ■ Timing Diagram
MCLK
LRCK
1/fCLK
tCLKH
tCLKL
1/fs
tBCK
BICK
tBCKH
tBCKL
Clock Timing
LRCK
BICK
SDTO
tBLR
tLRB
tLRS
tBSD
tSDS
tSDH
SDTI
Audio Interface Timing (Slave mode)
Note : BICK shows IBICK and OBICK, LRCK shows ILRCK and OLRCK.
www.Data[SAheKet44U1.2co7m]
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11 Page |
Páginas | Total 29 Páginas | |
PDF Descargar | [ Datasheet AK4127.PDF ] |
Número de pieza | Descripción | Fabricantes |
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