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PDF 68HC05B6 Data sheet ( Hoja de datos )
| Número de pieza | 68HC05B6 | |
| Descripción | MC68HC05B6 | |
| Fabricantes | Freescale Semiconductor | |
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Technical Data
M68HC05
Microcontrollers
MC68HC05B6/D
Rev. 4.1
08/2005
freescale.com
www.DataSheet4U.com
1 page  
www.DataSheet4U.com
CUSTOMER FEEDBACK QUESTIONNAIRE (MC68HC05B6/D rev. 4)
Motorola wishes to continue to improve the quality of its documentation. We would welcome your feedback on the publication you
have just received. Having used the document, please complete this card (or a photocopy of it, if you prefer).
1. How would you rate the quality of the document? Check one box in each category.
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2. What is your intended use for this document? If more than one option applies, please rank them (1, 2, 3).
Selection of device for new application
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5. Is the level of technical detail in the following sections sufficient to allow you to understand how the device functions?
SECTION 1 INTRODUCTION
SECTION 2 MODES OF OPERATION AND PIN DESCRIPTIONS
SECTION 3 MEMORY AND REGISTERS
SECTION 4 INPUT/OUTPUT PORTS
SECTION 5 PROGRAMMABLE TIMER
SECTION 6 SERIAL COMMUNICATIONS INTERFACE
SECTION 7 PULSE LENGTH D/A CONVERTERS
SECTION 8 ANALOG TO DIGITAL CONVERTER
SECTION 9 RESETS AND INTERRUPTS
SECTION 10 CPU CORE AND INSTRUCTION SET
SECTION 11 ELECTRICAL SPECIFICATIONS
SECTION 12 MECHANICAL DATA
SECTION 13 ORDERING INFORMATION
SECTION 14 APPENDICES
SECTION 15 HIGH SPEED OPERATION
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7. From your point of view, is anything missing from the document? If so, please say what:
TPG
5 Page 
Paragraph
Number
TABLE OF CONTENTS
5
PROGRAMMABLE TIMER
www.DataSheet4U.com
Page
Number
5.1
5.1.1
5.2
5.2.1
5.2.2
5.3
5.3.1
5.3.2
5.4
5.4.1
5.4.2
5.4.3
5.5
5.5.1
5.6
5.7
5.8
Counter ..............................................................................................................5–1
Counter register and alternate counter register ...........................................5–3
Timer control and status ....................................................................................5–4
Timer control register (TCR) ........................................................................5–4
Timer status register (TSR)..........................................................................5–6
Input capture......................................................................................................5–7
Input capture register 1 (ICR1) ....................................................................5–7
Input capture register 2 (ICR2) ....................................................................5–8
Output compare .................................................................................................5–9
Output compare register 1 (OCR1)..............................................................5–9
Output compare register 2 (OCR2)............................................................5–10
Software force compare .............................................................................5–11
Pulse Length Modulation (PLM) ......................................................................5–11
Pulse length modulation registers A and B (PLMA/PLMB) ........................5–11
Timer during STOP mode................................................................................5–12
Timer during WAIT mode.................................................................................5–12
Timer state diagrams .......................................................................................5–12
6
SERIAL COMMUNICATIONS INTERFACE
6.1 SCI two-wire system features ............................................................................6–1
6.2 SCI receiver features .........................................................................................6–3
6.3 SCI transmitter features.....................................................................................6–3
6.4 Functional description........................................................................................6–3
6.5 Data format ........................................................................................................6–5
6.6 Receiver wake-up operation ..............................................................................6–5
6.6.1 Idle line wake-up ..........................................................................................6–6
6.6.2 Address mark wake-up ................................................................................6–6
6.7 Receive data in (RDI) ........................................................................................6–6
6.8 Start bit detection...............................................................................................6–6
6.9 Transmit data out (TDO) ....................................................................................6–8
6.10 SCI synchronous transmission ..........................................................................6–9
6.11 SCI registers ....................................................................................................6–10
6.11.1 Serial communications data register (SCDR) ............................................6–10
6.11.2 Serial communications control register 1 (SCCR1) ...................................6–10
6.11.3 Serial communications control register 2 (SCCR2) ...................................6–14
6.11.4 Serial communications status register (SCSR)..........................................6–16
6.11.5 Baud rate register (BAUD) .........................................................................6–18
6.12 Baud rate selection ..........................................................................................6–19
6.13 SCI during STOP mode ...................................................................................6–21
6.14 SCI during WAIT mode....................................................................................6–21
MC68HC05B6
Rev. 4.1
TABLE OF CONTENTS
Freescale
iii
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 68HC05B6.PDF ] | |
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