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Número de pieza | NTMFS4846N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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Power MOSFET
30 V, 100 A, Single N−Channel, SO−8 FL
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Thermally Enhanced SO8 Package
• These are Pb−Free Device
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
C(Nuortreen1t)RqJA
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current
10 sec
RqJA
v
Power Dissipation
RqJA, t v 10 sec
Continuous Drain
C(Nuortreen2t)RqJA
Steady
State
Power Dissipation
RqJA (Note 2)
Continuous Drain
C(Nuortreen1t)RqJC
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
tp=10ms
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
TC = 25°C
TA = 25°C
VDSS
VGS
ID
PD
ID
PD
ID
PD
ID
PD
IDM
30
±16
20.3
14.6
2.25
32.8
23.7
5.90
12.7
9.2
0.89
100
72
55.5
200
V
V
A
W
A
W
A
W
A
W
A
Current limited by package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 37 Apk, L = 0.3 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IDmaxpkg
TJ,
TSTG
IS
dV/dt
EAS
TL
100
−55 to
+150
55
6
205
260
A
°C
A
V/ns
mJ
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
3.4 mW @ 10 V
5.1 mW @ 4.5 V
ID MAX
100 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
S
S
4846N
AYWWG
D
GGD
D
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4846NT1G SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4846NT3G SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
March, 2009 − Rev. 3
1
Publication Order Number:
NTMFS4846N/D
1 page NTMFS4846N
TYPICAL CHARACTERISTICS
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1000
100
10
VDS = 15 V
ID = 15 A
VGS = 11.5 V
td(off)
tr
tf
td(on)
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
30
28
26 VGS = 0 V
24 TJ = 25°C
22
20
18
16
14
12
10
8
6
4
2
0
0.4 0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
1000
100
VGS = 20 V
Single Pulse
TC = 25°C
10 ms
100 ms
10 1 ms
1
0.1
0.1
RDS(on) Limit
Thermal Limit
Package Limit
1
10 ms
dc
10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
220
200 ID = 37 A
180
160
140
120
100
80
60
40
20
0
25
50
75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
0
VDS = 1.5 V
10 20 30 40 50 60 70 80 90 100
DRAIN CURRENT (A)
Figure 13. gFS vs. Drain Current
1000
100
125°C
10
100°C 25°C
1
0.1
1 10 100 1000
PULSE WIDTH (ms)
Figure 14. Id vs. Pulse Width
10,000
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