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PDF NDF08N50Z Data sheet ( Hoja de datos )
| Número de pieza | NDF08N50Z | |
| Descripción | N-Channel Power MOSFET / Transistor | |
| Fabricantes | ON Semiconductor | |
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DataSheet.in
NDF08N50Z, NDP08N50Z
N-Channel Power MOSFET
500 V, 0.69 W
Features
• Low ON Resistance
• Low Gate Charge
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol NDF08N50Z NDP08N50Z Unit
Drain−to−Source Voltage
Continuous Drain Current
RqJC
Continuous Drain Current
RqJC TA = 100°C
Pulsed Drain Current,
VGS @ 10 V
Power Dissipation
Gate−to−Source Voltage
Single Pulse Avalanche
Energy, ID = 7.5 A
ESD (HBM)
(JESD 22−A114)
VDSS
ID
500
7.5 (Note 1)
7.5
ID 4.7 (Note 1)
4.7
IDM 30 (Note 1)
30
PD 31
125
VGS
30
EAS 190
Vesd
3500
V
A
A
A
W
V
mJ
V
RMS Isolation Voltage
(t = 0.3 sec., R.H. ≤ 30%,
TA = 25°C) (Figure 14)
Peak Diode Recovery
VISO
dv/dt
4500
4.5
V
V/ns
Continuous Source
Current (Body Diode)
IS
7.5 A
Maximum Temperature for
Soldering Leads
TL
260 °C
Operating Junction and
TJ, Tstg
Storage Temperature Range
−55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Limited by maximum junction temperature
2. ISD = 7.5 A, di/dt ≤ 100 A/ms, VDD ≤ BVDSS, TJ = +150°C
http://onsemi.com
VDSS
500 V
RDS(ON) (TYP) @ 3.6 A
0.69 W
N−Channel
D (2)
G (1)
TO−220FP
CASE 221D
STYLE 1
S (3)
MARKING
DIAGRAM
TO−220AB
CASE 221A
STYLE 5
NDF08N50ZG
or
NDP08N50ZG
AYWW
Gate
Source
Drain
A = Location Code
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
NDF08N50ZG
NDP08N50ZG
Package
TO−220FP
TO−220AB
Shipping
50 Units/Rail
In Development
© Semiconductor Components Industries, LLC, 2010
April, 2010 − Rev. 1
1
Publication Order Number:
NDF08N50Z/D
1 page  
DataSheet.in
NDF08N50Z, NDP08N50Z
TYPICAL CHARACTERISTICS
100
VGS v 30 V
SINGLE PULSE
10 TC = 25°C
1 ms
10 ms
100 ms
10 ms
dc
1
0.1
0.01
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 10 100
1000
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 12. Maximum Rated Forward Biased
Safe Operating Area NDF08N50Z
10
50% (DUTY CYCLE)
1.0
20%
10%
5.0%
0.1 2.0%
1.0%
0.01
SINGLE PULSE
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1 1.0 10
PULSE TIME (s)
Figure 13. Thermal Impedance (Junction−to−Case) for NDF08N50Z
RqJC = 4.0°C/W
Steady State
100 1000
LEADS
HEATSINK
0.110″ MIN
Figure 14. Isolation Test Diagram
Measurement made between leads and heatsink with all leads shorted together.
*For additional mounting information, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NDF08N50Z.PDF ] | |
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