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PDF NTMS4807N Data sheet ( Hoja de datos )
| Número de pieza | NTMS4807N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMS4807N
Power MOSFET
30 V, 14.8 A, N-Channel, SO-8
Features
•ăLow RDS(on) to Minimize Conduction Losses
•ăLow Capacitance to Minimize Driver Losses
•ăOptimized Gate Charge to Minimize Switching Losses
•ăThis is a Pb-Free Device
Applications
•ăDisk Drives
•ăDC-DC Converters
•ăPrinters
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain
Current RqJA (Note 1)
Power Dissipation RqJA
(Note 1)
TA = 25°C
TA = 70°C
TA = 25°C
VDSS
VGS
ID
PD
30
±20
12.2
9.8
1.55
Continuous Drain
Current RqJA (Note 2)
Steady
TA = 25°C
TA = 70°C
ID
9.1
7.3
Power Dissipation RqJA State TA = 25°C PD 0.86
(Note 2)
Continuous Drain
Current RqJA, t v 10 s
(Note 1)
TA = 25°C ID 14.8
TA = 70°C
11.8
Power Dissipation
RqJA, t v 10 s(Note 1)
TA = 25°C
Pulsed Drain Current
TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain-to-Source Avalanche Energy
(TJ = 25°C, VDD = 30 V, VGS = 10 V,
IL = 14 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
PD 2.3
IDM 50
TJ, -55 to
Tstg 150
IS 2.9
EAS 98
TL 260
Unit
V
V
A
W
A
W
A
W
A
°C
A
mJ
°C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction-to-Ambient – Steady State (Note 1)
RqJA
80.5 °C/W
Junction-to-Ambient – t v 10 s (Note 1)
RqJA
54.9
Junction-to-Foot (Drain)
RqJF
19.5
Junction-to-Ambient – Steady State (Note 2)
RqJA
145
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size.
2. Surfacemounted on FR4 board using the minimum recommended pad size.
www.DataSheet4U.com
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
6.1 mW @ 10 V
7.5 mW @ 4.5 V
ID MAX
14.8 A
N-Channel
D
G
S
1
SO-8
CASE 751
STYLE 12
MARKING DIAGRAM/
PIN ASSIGNMENT
1
Source
Source
Source
Gate
8
Drain
Drain
Drain
Drain
Top View
4807N = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMS4807NR2G SO-8 2500/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©Ă Semiconductor Components Industries, LLC, 2007
December, 2007 - Rev. 0
1
Publication Order Number:
NTMS4807N/D
1 page  
NTMS4807N
-X-
A
PACKAGE DIMENSIONS
SOIC-8
CASE 751-07
ISSUE AJ
B
-Y-
-Z-
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
J
0.25 (0.010) M Z Y S X S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2.
3.
CDOIMNETNRSOIOLLNINAGADNIDMBENDSOIONNO:wTMIwINLLCwILMU.EDDTEEaRt.aSheet4U.com
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751-01 THRU 751-06 ARE OBSOLETE. NEW
STANDARD IS 751-07.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
0.6
0.024
1.270
0.050
ǒ ǓSCALE 6:1
mm
inches
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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5
NTMS4807N/D
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